zl50400 Zarlink Semiconductor, zl50400 Datasheet - Page 17

• Manufacturer Part Number: zl50400
• Description: Lightly Managed/unmanaged 9-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

1.4
The ZL50400 Fast Ethernet access ports (0-7) support 3 interface options: RMII, MII & GPSI. The table below
summarizes the interface signals required for each interface and how they relate back to the Pin Symbol name
shown in the “Ball Signal Description Table” on page 12. It also specifies whether the internal pull-up/down resistor
is present for each pin in the specific operating mode.
Notes :
I – Input
O – Output
U – Pullup
D - Pulldown
M[7:0]_RXD0
M[7:0]_RXD1
M[7:0]_RXD2
M[7:0]_RXD3
M[7:0]_TXEN
M[7:0]_CRS_DV
M[7:0]_TXD0
M[7:0]_TXD1
M[7:0]_TXD2
M[7:0]_TXD3
M[7:0]_COL
M[7:0]_TXCLK
M[7:0]_RXCLK
Fast Ethernet
Access Ports
Pin Symbol
Signal Mapping and Internal pull-up/Down Configuration
TSTOUT9=’1’)
(Bootstrap
Module
No
(U)
(U)
(U)
(U)
(O)
(U)
(O)
(O)
(O)
(O)
(D)
(U)
(U)
Table 1 - Signal Mapping In Different Operation Mode
M[7:0]_CRS_DV (I)
NC (D)
NC (U)
NC (U)
M[7:0]_RXD0 (I)
M[7:0]_RXD1 (I)
NC (U)
NC (U)
M[7:0]_TXEN (O)
M[7:0]_TXD0 (O)
M[7:0]_TXD1 (O)
NC (O)
NC (O)
(ECR4Pn[4:3]='11')
RMII Mode
Zarlink Semiconductor Inc.
ZL50400
17
M[7:0]_RXD0 (I)
M[7:0]_RXD1 (I)
M[7:0]_RXD2 (I)
M[7:0]_RXD3 (I)
M[7:0]_TXEN (O)
M[7:0]_DV (I)
M[7:0]_TXD0 (O)
M[7:0]_TXD1 (O)
M[7:0]_TXD2 (O)
M[7:0]_TXD3 (O)
M[7:0]_COL (I)
M[7:0]_TXCLK (IO)
M[7:0]_RXCLK (IO)
(ECR4Pn[4:3]='01')
MII Mode
M[7:0]_RXD (I)
NC (U)
NC (U)
NC (U)
M[7:0]_TXEN (O)
M[7:0]_CRS (I)
M[7:0]_TXD (O)
NC (O)
NC (O)
NC (O)
M[7:0]_COL (I)
M[7:0]_TXCLK (IO)
M[7:0]_RXCLK (IO)
(ECR4Pn[4:3]='00')
GPSI Mode
Data Sheet