tmp89fm42a TOSHIBA Semiconductor CORPORATION, tmp89fm42a Datasheet - Page 50
tmp89fm42a
Manufacturer Part Number
tmp89fm42a
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM42A.pdf
(431 pages)
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RA000
2.3.5.3
states in effect before the system was stopped are held with low power consumption.
(3)
(4)
(5)
(6)
In this mode, all the operations in the system, including the oscillation circuits, are stopped and the internal
STOP mode
peripheral circuits operate using the clock that is a quarter of the low-frequency clock (fs).
SLOW2 mode.
For operations of the peripheral circuits in the SLOW mode, refer to the section of each peripheral
circuit.
clock (fcgck) or the clock that is a quarter of the low-frequency clock (fs).
returns to the NORMAL2 mode after this mode is released.
timer stop, and the peripheral circuits operate using the clock that is a quarter of the low-frequency clock
(fs).
For operations of the peripheral circuits in the SLEEP1 mode, refer to the section of each peripheral
circuit.
operation returns to the SLOW1 mode after this mode is released.
using the clock that is a quarter of the low-frequency clock (fs), and the core and the peripheral circuits
stop.
or become the same as the states when a reset is released. For operations of the peripheral circuits in the
SLEEP0 mode, refer to the section of each peripheral circuit.
operation returns to the SLOW1 mode after this mode is released.
circuits except the time base timer.
In this mode, the high-frequency clock oscillation circuit stops operation and the CPU core and the
This mode requires less power to operate the high-frequency clock oscillation circuit than in the
In the SLOW mode, some peripheral circuits become the same as the states when a reset is released.
Set SYSCR2<XEN> to switch the operation between the SLOW1 and SLOW2 modes.
In the SLOW1 or SLEEP1 mode, outputs of the prescaler and stages 1 to 8 of the divider stop.
In this mode, the CPU and the watchdog timer stop and the peripheral circuits operate using the gear
The IDLE2 mode can be activated and released in the same way as for the IDLE1 mode. The operation
In this mode, the high-frequency clock oscillation circuit stops operation, the CPU and the watchdog
In the SLEEP1 mode, some peripheral circuits become the same as the states when a reset is released.
The SLEEP1 mode can be activated and released in the same way as for the IDLE1 mode. The
In the SLOW1 or SLEEP1 mode, outputs of the prescaler and stages 1 to 8 of the divider stop.
In this mode, the high-frequency clock oscillation circuit stops operation, the time base timer operates
In the SLEEP0 mode, the peripheral circuits stop in the states when the SLEEP0 mode is activated
The SLEEP0 mode can be activated and released in the same way as for the IDLE0 mode. The
In the SLEEP0 mode, the CPU stops and the timing generator stops the clock supply to the peripheral
SLOW1 mode
IDLE2 mode
SLEEP1 mode
SLEEP0 mode
Page 31
TMP89FM42A
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