tmp89fm42a TOSHIBA Semiconductor CORPORATION, tmp89fm42a Datasheet - Page 42

• Manufacturer Part Number: tmp89fm42a
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA000
Table 2-3 Steps for Switching the High-Frequency Reference Clock (fh) from fc to fosc
Note:Be sure to follow the above steps when switching the high-frequency reference clock.
External high-frequency
clock (fc)
Internal high-frequency
clock (fosc)
SYSCR1<OSCSEL>
High-frequency
reference clock (fh)
Step
1
2
3
4
Figure 2-6 Switching the High-Frequency Reference Clock (fh) (fc→fosc)
P0FC0
1
1
1
1
Note 1: When the high-frequency reference clock (fh) is switched, the hardware synchronizes the external
Note 2: After changing SYSCR1<OSCSEL>, be sure to wait for at least 2 machine cycles before clearing
Note 3: SYSCR1<OSCSEL> must be set while SYSCR2<SYSCK> = "0" (during the NORMAL1 or NOR-
Note 4: Setting SYSCR2<XEN> to "1" while P0FC0 = "0" generates a system clock reset.
Note 5: If SYSCR2<XEN> is set to "1" while SYSCR2<XEN> = "1", the warm-up counter does not start
・ Switching from fc to fosc
<OSCEN>
tion by using the warm-up counter, clear SYSCR1<OSCSEL> to "0".
frequency reference clock (fh) changes to the internal high-frequency clock (fosc).
clear SYSCR2<XEN> to "0" to stop the external high-frequency clock (fc). If SYSCR2<XEN>
is cleared to "0" while the reference clock (fh) is being switched, a system clock reset is gen-
erated.
SYSCR2
high-frequency clock (fc) and the internal high-frequency clock (fosc). While this is done, fh stops
for a maximum of 2.5/fosc [s].
SYSCR2<XEN> to "0". If SYSCR2<XEN> is cleared to "0" without waiting for at least 2 machine
cycles, a system clock reset is generated.
MAL2 mode). Writing to SYSCR1<OSCSEL> while SYSCR2<SYSCK> = "1" (during the SLOW1
or SLOW2 mode) has no effect.
counting the source clock.
Set SYSCR1<OSCEN> to "1" to enable the internal high-frequency clock (fosc).
After making sure that the internal high-frequency clock (fosc) has achieved stable oscilla-
A maximum of 2/fc + 2.5/fosc [s] after SYSCR1<OSCSEL> is cleared to "0", the high-
After the reference clock (fh) has been switched, wait for at least 2 machine cycles, and then
0
1
1
1
SYSCR2
<XEN>
1
1
1
0
<OSCSEL>
SYSCR1
1
1
0
0
Page 23
Main system
2.5 / fosc (max.)
fc→fosc
clock
fosc
fc
fc
The high-frequency reference clock is fc.
The high-frequency clock oscillation circuit is warming
up.
The high-frequency reference clock is being switched
to fosc.
The high-frequency reference clock has been switch-
ed to fosc.
State
TMP89FM42A