stc3800 Connor-Winfield VCXOs, stc3800 Datasheet - Page 23

• Manufacturer Part Number: stc3800
• Description: Integrated - Stratum 3e Timing Source
• Manufacturer: Connor-Winfield VCXOs

Register Descriptions and Operation continued
Ref(1-8)_Frq_Priority, 0x1c ~ 0x23 (R/W)
Bits 2 - 0 indicate the priority of each reference for use in automatic reference selection mode (bit 1 of the Ctl_Mode register =0).
In manual reference selection mode (bit 1 of the Ctl_Mode register = 1 or HM_Ref = 1), these bits are read-only and will contain
either the reset default or values written when last in automatic reference selection mode. For equal priority values, lower reference
numbers have higher priority.
highest priority of other “available” (signal present, non-masked, and acceptable frequency off-set) reference will be selected.
When a reference returns, it will be switched to only if it is of higher priority and the current active reference is marked “Revertive”.
register = 1 or HM_Ref=1). When reference frequency is in autodetect mode, (bit 0 of the Ctl_Mode register = 0 and HM_Ref=0),
these bits are read-only and will indicate the auto-detected frequency for each reference. If there is no activity on a reference, bits
7-4 will be = 0000. Bits 7 - 4 are read only.
Free Run_Priority, 0x24 (R/W)
Free Run may be treated like a reference. When it is enabled, Free Run will be entered when all references of higher priority are lost
or masked. If/when a higher priority reference returns, it is switched to if Free Run is set as “revertive”. When disabled, Free Run will
be entered only if manually selected, or all references fail and no Hold Over history is available. For equal priority value, Free Run
will be treated as lower priority.
History_Policy, 0x25 (R/W)
Bit 0 determines if Hold Over history is retained or rebuilt when a reference switch occurs. See Application Notes, Hold Over
History Accumulation and Management section.
Bit 3 specifies if the reference is revertive or non-revertive in automatic reference selection mode. When a reference fails, the
Bits 7 - 4 indicate the frequency of the reference when reference frequency selection is in manual mode (bit 0 of the Ctl_Mode
Registers 0x1c - 0x23 correspond to Ref1 - Ref8.
Frequency
0000: None
0001: 8 kHz
0010: 1.544 MHz
0011: 2.048 MHz
0100: 12.96 MHz
0101: 19.44 MHz
0110: 25.92 MHz
0111: 38.88 MHz
1000: 51.84 MHz
1001: 77.76 MHz
1010-1111: Reserved
Reserved
Bit 7 ~ Bit 5
Bit 7 ~ Bit 4
Bit 7 ~ Bit 1
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved
Preliminary Data Sheet #: TM061
Bit 4
Enable/disable
1: enabled
2: disabled
0: Default,
Bit 3
Revertivity
1: revertive
0: non-revertive
Default: 0,
non revertive
disabled
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revertivity
0: Default,
Bit 3
1: revertive
0: non-revertive
non-revertive
Reference switch Hold Over History Policy
0: rebuild
1: continue
Default: 0, rebuild
Bit 0
Specifications subject to change without notice
Bit 2 ~ Bit 0
Priority
0: highest
7: lowest
Default: 0
Rev: P06 Date: 11/22/04
Bit 2 ~ Bit 0
priority
0: highest
7: lowest
0: Default