pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 78

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

IDCODE
A 32-bit identification register is serially read out on pin TDO. It contains the version number (4 bits), the device
code (16 bits) and the manufacturer code (11 bits). The LSB is fixed to "1".
The ID code field is set to (MSB to LSB): t.b.d.
Version number (first 4 bits) = ´0001
Part Number (next 16 bits) = ´0000 0001 0000 0100
Manufacturer ID (next 11 bits) = 0000 1000 001
LSB fixed to ´1´.
BYPASS
A bit entering TDI is shifted to TDO after one TCK clock cycle.
An alphabetical overview of all TAP controller operation codes is given in
Table 11
TAP Instruction
BYPASS
EXTEST
IDCODE
SAMPLE
Reserved for device test
3.5.5
The QuadLIU
supplied on pin MCLK, see
The clocking unit has two different modes:
•
•
For the calculation for the appropriate register settings see GCM6. Calculation can be done easy by using the
flexible Master Clock Calculator which is part of the software support of the QuadLIU
All required clocks for E1 or T1/J1 operation are generated by this circuit internally. The global setting depends
only on the selected master clock frequency and is the same for E1 and T1/J1 because both clock rates are
provided simultaneously.
To meet the E1 requirements the MCLK reference clock must have an accuracy of better than ± 32 ppm. The
synthesized clock can be controlled on pins RCLK and FCLKR.
Data Sheet
In the so called “flexible master clocking mode” (GCM2.VFREQ_EN = ´1´, GCM2) the clocking unit has to be
tuned to the selected reference frequency by setting the global clock mode registers GCM(8:1) accordingly,
see formulas in GCM6. All four ports can work in E1 or T1 mode individually. After reset the clocking unit is in
“flexible master clocking mode”.
In the so called “clocking fixed mode” (GCM2.VFREQ_EN = ´0´) the tuning of the clocking unit is done
internally so that no setting of the global clock mode registers GCM(8:1) is necessary. All four ports must work
together either in E1 or in T1 mode.
TAP Controller Instruction Codes
Master Clocking Unit
TM
provides a flexible clocking unit, which references to any clock in the range of 1.02 to 20 MHz
Figure
20.
B
´
B
´
B
´
78
Instruction Code
11111111
00000000
00000100
00000001
01010011
Table
11.
TM
, see
Functional Description
Rev. 1.3, 2006-01-25
Chapter
QuadLIU
PEF 22504
8.3.
TM