pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 127

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Mode Register 2
MR2
Mode Register 2
Field
RTM
DAIS
PLB
Data Sheet
Bits
5
4
2
Type
rw
rw
rw
Description
Receive Transparent Mode, E1 only
For E1 mode this bit must be set to ´1´ for proper operation.
0
1
Disable AIS to Framer Interface
This bit must be set to ´1´ for proper operation.
0
1
Payload Loop-Back
See
0
1
B
B
B
B
B
B
Chapter
QuadLIU
be initiated by programming bit MR2.SAIS.
section back to transmitter section. Looped data is output on pin
RDO. Data received on port XDI, XSIG, SYPX and XMFS is
ignored.
Automatic AIS insertion is disabled. Furthermore, AIS insertion can
reserved
AIS is automatically inserted into the data stream to RDO if
Normal operation. Payload loop is disabled.
The payload loop-back loops the data stream from the receiver
Offset
xx1E
3.11.5.
TM
127
is in asynchronous state.
H
Register DescriptionMode Register 2
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Reset Value
00
TM
H