pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 35

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Table 1
Pin No.
Boundary Scan/Joint Test Access Group (JTAG)
B6
D11
D5
C4
C11
Note: oD = open drain output PU = input or input/output comprising an internal pull-up device To override the
Data Sheet
internal pull-up by an external pull-down, a resistor value of 22 k is recommended. The pull-up devices are
activated during reset, this means their state is undefined until the reset signal has been applied. Unused
pins containing pull-ups can be left open.
I/O Signals (cont’d)for P/PG-LBGA-160-1
Name
TRS
TDI
TMS
TCK
TDO
Pin Type Buffer
I
O
Type
PD
PU
–
35
Function
Test Reset
For Boundary Scan (active low). If not connected, an
internal pull-down transistor ensures low input level.
Test Data Input
For Boundary Scan.
If not connected an internal pull-up transistor ensures
high input level.
Test Mode Select
For Boundary Scan.
If not connected an internal pull-up transistor ensures
high input level.
Test Clock
For Boundary Scan.
If not connected an internal pull-up transistor ensures
high input level.
Test Data Output
For Boundary Scan
Rev. 1.3, 2006-01-25
Pin Descriptions
QuadLIU
PEF 22504
TM