pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 137

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Line Interface Mode 0
LIM0
Line Interface Mode 0
Field
XFB
XDOS
RTRS
DCIM
Data Sheet
Bits
7
6
5
4
Type
rw
rw
rw
rw
Description
Transmit Full Bauded Mode
Only applicable for dual-rail mode (bit LIM1.DRS = ´1´).
Note: If CMI coding is selected (MR0.XC(1:0) = ´01
0
1
Transmit Data Out Sense
Note: If CMI coding is selected (MR0.XC(1:0) = ´01
0
1
Receive Termination Resistance Selection
This bit controls switching of the internal 300
line interface, see also
Note: If the RLT functionality is selected at one of the multi function ports,
0
1
Digital Clock Interface Mode
Note: DCO-X must be used in DCIM mode (CMR1.DXJA = ´0´).
0
1
B
B
B
B
B
B
B
B
cleared.
cleared. The transmit frame marker XFM is independent of this bit.
high (normal operation).
low.
the 300
the level at RLT. If RLT functionality is not configured at one of the
multi function ports, the 300
mode) according to ITU-T G.703, Section 13.
A 2048/1544 kHz clock is expected on RL1/2. On XL1/2 a
2048/1544 kHz output clock is driven. The transmit clock signal on
XL1/2 is derived from the clock supplied on FCLKX
(CMR1.DXSS = ´0´).
enables the digital Clock Interface Mode (synchronization interface
Output signals XDO/XDON are half bauded.
Output signals XDO/XDON are full bauded.
Output signals XDO/XDON are active low. Output XOID is active
Output signals XDO/XDON are active high. Output XOID is active
300
300
normal operation.
resistance is switched off.
resistance is switched on.
Offset
xx36
137
resistance is switched off, independend from RTRS and
H
Chapter
Register DescriptionLine Interface Mode 0
3.7.3.
switch is controlled only by RTRS.
resistance at the receive
b
b
Rev. 1.3, 2006-01-25
´) this bit has to be
´) this bit has to be
QuadLIU
PEF 22504
Reset Value
00
TM
H