mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 60

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mc68hc908gr8vp

Manufacturer Part Number
mc68hc908gr8vp
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Analog-to-Digital Converter (ADC)
5.7.2 ADC Data Register
One 8-bit result register, ADC data register (ADR), is provided. This register is updated each time an ADC
conversion completes.
5.7.3 ADC Clock Register
The ADC clock register (ADCLK) selects the clock frequency for the ADC.
ADIV2–ADIV0 — ADC Clock Prescaler Bits
60
ADIV2–ADIV0 form a 3-bit field which selects the divide ratio used by the ADC to generate the internal
ADC clock.
approximately 1 MHz.
Address:
Address:
Table 5-2
Reset:
Reset:
Read:
Read:
Write:
Write:
$0003D
$0003E
ADIV2
X = don’t care
Bit 7
AD7
Bit 7
0
0
shows the available clock configurations. The ADC clock should be set to
ADIV2
0
0
0
0
1
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Figure 5-4. ADC Clock Register (ADCLK)
= Unimplemented
= Unimplemented
ADIV1
Figure 5-3. ADC Data Register (ADR)
AD6
6
0
6
0
Table 5-2. ADC Clock Divide Ratio
ADIV1
X
0
0
1
1
ADIV0
AD5
5
0
5
0
ADIV0
0
1
0
1
X
ADICLK
AD4
4
0
4
0
ADC input clock ÷ 1
ADC input clock ÷ 2
ADC input clock ÷ 4
ADC input clock ÷ 8
ADC input clock ÷ 16
AD3
3
0
3
0
0
ADC Clock Rate
AD2
2
0
2
0
0
AD1
1
0
1
0
0
Freescale Semiconductor
Bit 0
AD0
Bit 0
0
0
0

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