mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 252

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mc68hc908gr8vp

Manufacturer Part Number
mc68hc908gr8vp
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Electrical Specifications
252
10. Power supply must maintain regulation within operating V
11. Pullups and pulldowns are disabled.
12. Digital inputs have hysteresis whenever they are configured for any alternative peripheral input function other than as a
13. Maximum is highest voltage that POR is guaranteed.
14. Maximum is highest voltage that POR is possible.
15. If minimum V
Pullup resistors (as input only)
Capacitance
Monitor mode entry voltage
Low-voltage inhibit, trip falling voltage – target
Low-voltage inhibit, trip rising voltage – target
Low-voltage inhibit reset/recover hysteresis – target
Input hysteresis (alternative input functions only)
POR rearm voltage
POR reset voltage
POR rise time ramp rate
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I
4. Wait I
5. Stop I
6. Stop I
7. This parameter is characterized and not tested on each device.
8. All functional non-supply pins are internally clamped to V
9. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
Ports PTA3/KBD37–PTA0/KBD0, PTC1–PTC0,
Ports (as input or output)
(V
dc loads. Less than 100 pF on all outputs. C
affects run I
than 100 pF on all outputs. C
I
from rail. No dc loads. Less than 100 pF on all outputs. All ports configured as inputs.
resistance values for positive and negative clamp voltages, then use the larger of the two values.
conditions. If positive injection current (V
result in external power supply going out of regulation. Ensure external V
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is
present, or if clock rate is very low (which would reduce overall power consumption).
general-purpose input.
V
DD
DD
DD
TRIPF
PTD6/T2CH0–PTD0/SS
. Measured with PLL and LVI enabled.
= 3.0 Vdc
is reached.
DD
DD
DD
+
measured using external square wave clock source (f
with TBM enabled is measured using an external square wave clock source (f
is measured with OSC1 = V
V
DD
HYS
DD
. Measured with all modules enabled.
±
(14)
(7), (13)
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
=
10%, V
Characteristic
V
measured using external square wave clock source (f
TRIPR
(7), (15)
SS
)
= 0 Vdc, T
L
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait
(1)
SS
A
.
= T
IN
> V
L
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
(7), (12)
to T
DD
) is greater than I
H
, unless otherwise noted
SS
DD
V
and V
Symbol
V
V
V
V
PORRST
R
C
V
range during instantaneous and operating maximum current
V
osc
TRIPR
R
TRIPF
InHYS
C
POR
HYS
POR
Out
TST
PU
In
= 16.4 MHz). All inputs 0.2 V from rail. No dc loads. Less
DD
DD
.
, the injection current may flow out of V
0.06 x V
DD
V
osc
DD
0.035
2.35
2.45
load will shunt current greater than maximum
Min
20
0
0
= 16.4 MHz). All inputs 0.2 V from rail. No
+2.5
DD
OSC
Typ
2.60
2.66
700
45
60
= 32.8 KHz). All inputs 0.2 V
(2)
Freescale Semiconductor
V
DD
Max
2.70
2.80
100
800
65
12
8
+4.0
DD
and could
V/ms
Unit
mV
mV
mV
pF
V
V
V
V

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