stlc5412 STMicroelectronics, stlc5412 Datasheet - Page 52

• Manufacturer Part Number: stlc5412
• Description: 2b1q U Interface Device Enhanced With Dect Mode
• Manufacturer: STMicroelectronics

STLC5412
Table 8: REGISTER ACCESS MESSAGES
Notes:
1. Bit 7 of byte 1 is the first bit clocked into the UID.
2. All configuration registers can be read-back by setting bit 7 of BYTE 1 equal 1
3. RXOH is a Write only register to force RXEOC, RXM4, RXM56, RXACT status register sending. RST reset the device
4. It is recommended not to access all RESERVED adresses. X means 1 or 0
W refers to a write operation.
R refers to a request for read-back.
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NOP
RESERVED
OPR
OPR
CR1
CR1
CR2
CR2
CR3
CR3
CR4
CR4
CR5
CR5
CR6
CR6
CR7
CR7
TXB1
TXB1
TXB2
TXB2
RXB1
RXB1
RXB2
RXB2
TXD
TXD
RXD
RXD
RESERVED
FUNCTION
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
AD7/4
0000
0001
0010
0010
0010
0010
0010
0010
0010
0010
0010
0010
0010
0010
0010
0010
0010
0010
0011
0011
0011
0011
0011
0011
0011
0011
0011
0011
0011
0011
0011
BYTE 1
AD3/1
XXX
11X
000
000
000
001
001
010
010
011
011
100
100
101
101
110
110
111
111
000
000
001
001
010
010
011
011
100
100
101
101
AD0
0
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
T15E
DX5
DR5
SFS
EB1
FF1
LB1
CIE
IO4
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ACTAUT PUPAUT
NTS
DR4
EB2
DX4
FF0
LB2
EIE
IO3
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B1R5
B2R5
DMO
B1X5
B2X5
DR3
CK2
LBD
DX3
FIE
IO2
ED
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B1X4
B2X4
B1R4
B2R4
DEN
FFIT
OB1
CK1
DB1
DX2
DR2
IO1
QM
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BYTE 2
B1X3
B2X3
B1R3
B2R3
ESFr
OB0
CK0
ETC
DB2
DX1
DR1
AIS
D4
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CTLIO
LOCK PL2EN DECT
TFB0
B1X2
B2X2
B1R2
B2R2
DDM
DBD
BP1
DX0
DR0
0C1
D3
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B1X1
B2X1
B1R1
B2R1
MOB
CMS
RFS
SR1
0C0
BP2
TLB
SX1
D2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B1R0
B2R0
T15D
B1X0
B2X0
BEX
CTC
C2E
LFS
SX0
SR0
RR
D1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0