s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 235

• Manufacturer Part Number: s908az32ag2cfue
• Description: M68hc08 Microcontrollers 8-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

ADIV2–ADIV0 — ADC Clock Prescaler Bits
ADICLK — ADC Input Clock Register Bit
Freescale Semiconductor
ADIV2, ADIV1, and ADIV0 form a 3-bit field which selects the divide ratio used by the ADC to generate
the internal ADC clock.
set to approximately 1 MHz.
ADICLK selects either bus clock or CGMXCLK as the input clock source to generate the internal ADC
clock. Reset selects CGMXCLK as the ADC clock source.
If the external clock (CGMXCLK) is equal to or greater than 1 MHz, CGMXCLK can be used as the
clock source for the ADC. If CGMXCLK is less than 1 MHz, use the PLL-generated bus clock as the
clock source. As long as the internal ADC clock is at approximately 1 MHz, correct operation can be
guaranteed. See
1 = Internal bus clock
0 = External clock (CGMXCLK)
During the conversion process, changing the ADC clock will result in an
incorrect conversion.
25.1.6 ADC
Table 21-2
X = don’t care
ADIV2
0
0
0
0
1
Characteristics.
Table 21-2. ADC Clock Divide Ratio
1 MHz = ⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯
MC68HC908AZ32A Data Sheet, Rev. 2
shows the available clock configurations. The ADC clock should be
ADIV1
0
0
1
1
X
f
XCLK
ADIV0
NOTE
X
0
1
0
1
or Bus Frequency
ADIV[2:0]
ADC Input Clock / 16
ADC Input Clock / 2
ADC Input Clock / 4
ADC Input Clock / 8
ADC Input Clock /1
ADC Clock Rate
I/O Registers
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