s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 120

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s908az32ag2cfue

Manufacturer Part Number
s908az32ag2cfue
Description
M68hc08 Microcontrollers 8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Monitor ROM (MON)
12.3.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See
The data transmit and receive rate can be anywhere up to 28.8 kBaud. Transmit and receive baud rates
must be identical.
12.3.3 Echoing
As shown in
for error checking.
Any result of a command appears after the echo of the last byte of the command.
12.3.4 Break Signal
A start bit followed by nine low bits is a break signal. (See
signal, it drives the PTA0 pin high for the duration of two bits before echoing the break signal.
120
Figure 12-2
SENT TO
MONITOR
BREAK
$A5
ECHO
Figure
START
BIT
START
START
and
BIT
BIT
0
12-4, the monitor ROM immediately echoes each received byte back to the PTA0 pin
BIT 0
READ
1
Figure
BIT 0
BIT 0
2
BIT 1
12-3.)
3
Figure 12-3. Sample Monitor Waveforms
MISSING STOP BIT
BIT 1
BIT 1
READ
4
Figure 12-2. Monitor Data Format
BIT 2
Figure 12-5. Break Transaction
MC68HC908AZ32A Data Sheet, Rev. 2
Figure 12-4. Read Transaction
5
BIT 2
BIT 2
6
BIT 3
ADDR. HIGH
BIT 3
BIT 3
7
BIT 4
BIT 4
BIT 4
ADDR. HIGH
BIT 5
Figure
BIT 5
BIT 5
TWO-STOP-BIT DELAY BEFORE ZERO ECHO
BIT 6
0
12-5). When the monitor receives a break
ADDR. LOW
BIT 6
BIT 6
1
BIT 7
2
BIT 7
BIT 7
3
STOP
ADDR. LOW
BIT
STOP
STOP
4
BIT
BIT
START
NEXT
5
BIT
Freescale Semiconductor
START
START
NEXT
NEXT
BIT
BIT
6
RESULT
DATA
7

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