nsc800 National Semiconductor Corporation, nsc800 Datasheet - Page 33

• Manufacturer Part Number: nsc800
• Description: Nsc800tm High-performance Low-power Cmos Microprocessor
• Manufacturer: National Semiconductor Corporation

12 4 8-Bit Loads
LD
Load memory from the Accumulator
m
Timing
Addressing Mode
Timing
Addressing Mode
LD
Load memory with immediate data
m
Timing
Addressing Mode
Timing
Addressing Mode
7 6
1 1 N
0 0
7
0
0
7
0
7
0
2
1
0
0
6
0
0
6
6
n (high-order byte)
n (low-order byte)
m
m
A
n
5
0
0
5
1
5
1
5
1
1
X
2
n
A
4
0
1
4
1
4
1
4 3 2 1 0
1 1 1 0 1
1 0 1 1 0
d
n
n
3
0
0
3
0
3
0
2
0
0
2
0
2
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
(Continued)
No flags affected
M cycles
T states
Source
Destination
M cycles
T states
Source
Destination
No flags affected
M cycles 3
T states 10 (4 3 3)
Source Immediate
Destination Register Indirect
M cycles 5
T states 19 (4 4 3 5 3)
Source Immediate
Destination Indexed
LD (BC) A
LD (DE) A
LD (nn) A
LD (IX
LD (IY
LD(HL) n
Register (Implied)
Register (Implied)
a
a
7 (4 3)
3 (4 3 3 3)
2
4
d) n(for N
d) n(for N
Register Indirect
Direct
X
X
e
e
0)
1)
33
MEMORY TO REGISTER
LD
Load register r from memory location m
r
Timing
Addressing Mode
Timing
Addressing Mode
LD
Load the Accumulator from memory location m
A
Timing
Addressing Mode
Timing
Addressing Mode
7 6
1 1 N
0 1
7
0
7
0
0
7
0
6
1
6
0
0
6
0
n (high-order byte)
n (low-order byte)
m
m
r m
A m
1
5
5
0
0
5
1
2
5
X
1
2
4
4
0
1
4
1
r
4 3 2 1 0
1 1 1 0 1
r
d
3
3
1
1
3
1
2
1
2
0
0
2
0
1 1 0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
No flags affected
M cycles 2
T states 7 (4 3)
Source Register Indirect
Destination Register
M cycles 5
T states 19 (4 4 3 5 3)
Source Indexed
Destination Register
No flags affected
M cycles 2
T states 7 (4 3)
Source Register Indirect
Destination Register (Implied)
M cycles 4
T states 13 (4 3 3 3)
Source Immediate Extended
Destination Register (Implied)
LD r (IX
LD r (IY
LD R (HL)
LD A (BC)
LD A (DE)
LD A (nn)
a
a
1
d) (for N
d) (for N
2
X
X
e
e
0)
1)