nsc800 National Semiconductor Corporation, nsc800 Datasheet - Page 13

• Manufacturer Part Number: nsc800
• Description: Nsc800tm High-performance Low-power Cmos Microprocessor
• Manufacturer: National Semiconductor Corporation

8 0 Functional Description
8 4 3 Carry (C)
A carry from the highest order bit of the accumulator during
an add instruction or a borrow generated during a subtrac-
tion instruction sets the carry flag Specific shift and rotate
instructions also affect this bit
Two specific instructions in the NSC800 instruction reper-
toire set (SCF) or complement (CCF) the carry flag
Other operations that affect the C flag are as follows
Other operations do not affect the C flag
8 4 4 Adds Subtract (N)
This flag is used in conjunction with the H flag to ensure that
the proper BCD correction algorithm is used during the deci-
mal adjust instruction (DAA) The correction algorithm de-
pends on whether an add or subtract was previously done
with BCD operands
The operations that set the N flag are
The operations that reset the N flag are
Other operations do not affect the N flag
8 4 5 Parity Overflow (P V)
The Parity Overflow flag is a dual-purpose flag that indi-
cates results of logic and arithmetic operations In logic op-
erations the P V flag indicates the parity of the result the
flag is set (high) if the result is even reset (low) if the result
is odd In arithmetic operations it represents an overflow
condition when the result interpreted as signed two’s com-
plement arithmetic is out of range for the eight-bit accumu-
lator (i e
Adds
Subtracts
Logic Operations (always resets C flag)
Rotate Accumulator
Rotate and Shifts
Decimal Adjust
Negation of Accumulator
Subtractions
Decrements (8-bit)
Complementing of the Accumulator
Block I O
Block Searches
Negation of the Accumulator
Adds
Increments
Logic Operations
Rotates
Set and Complement Carry
Input Register Indirect
Block Transfers
Load of the I or R Registers
Bit Tests
b
128 to
a
127)
(Continued)
13
The following operations affect the P V flag according to
the parity of the result of the operation
The following operations affect the P V flag according to
the overflow result of the operation
The P V flag has no significance immediately after the fol-
lowing operations
In block transfers and compares the P V flag indicates the
status of the BC register always ending in the reset state
after an auto repeat of a block move Other operations do
not affect the P V flag
8 4 6 Half Carry (H)
This flag indicates a BCD carry or borrow result from the
low-order four bits of operation It can be used to correct the
results of a previously packed decimal add or subtract op-
eration by use of the Decimal Adjust Instruction (DAA)
The following operations affect the H flag
The H flag has no significance immediately after the follow-
ing operations
Other operations do not affect the H flag
Logic Operations
Rotate and Shift
Rotate Digits
Decimal Adjust
Input Register Indirect
Adds (16 bit with carry 8-bit with without carry)
Subtracts (16 bit with carry 8-bit with without carry)
Increments and Decrements
Negation of Accumulator
Block I O
Bit Tests
Adds (8-bit)
Subtracts (8-bit)
Increments and Decrements
Decimal Adjust
Negation of Accumulator
Always Set by
Always Reset By
16-bit Adds with without carry
16-Bit Subtracts with carry
Complement of the carry
Block I O
Block Searches
Complement Accumulator
Bit Testing
Logic AND
Rotates and Shifts
Set Carry
Input Register Indirect
Block Transfers
Loads of I and R Registers
Logic OR’s and XOR’s