ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 186

• Manufacturer Part Number: ST72344S4
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72344S4

• Up To 16 Kbytes Program Memory: single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
• 256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
• 5 Power-saving Modes: Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
• 16-bit Timer A With: 1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

On-chip peripherals
11.8.3
Note:
186/247
Functional description
The conversion is monotonic, meaning that the result never decreases if the analog input
does not and never increases if the analog input does not.
If the input voltage (V
conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without
overflow indication).
If the input voltage (V
conversion result in the ADCDRH and ADCDRL registers is 00 00h.
The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH
and ADCDRL registers. The accuracy of the conversion is described in the Electrical
Characteristics Section.
R
is too high, this will result in a loss of accuracy due to leakage and sampling not being
completed in the allotted time.
A/D converter configuration
The analog input ports must be configured as input, no pull-up, no interrupt. Refer to the
«I/O ports» chapter. Using these pins as analog inputs does not affect the ability of the port
to be read as a logic input.
In the ADCCSR register:
Starting the conversion
In the ADCCSR register:
●
When a conversion is complete:
●
●
A read to the ADCDRH resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
2.
3.
The data is not latched, so both the low and the high data register must be read before the
next conversion is complete, so it is recommended to disable interrupts while reading the
conversion result.
To read only 8 bits, perform the following steps:
1.
2.
AIN
–
Set the ADON bit to enable the A/D converter and to start the conversion. From this
time on, the ADC performs a continuous conversion of the selected channel.
The EOC bit is set by hardware.
The result is in the ADCDR registers.
Poll the EOC bit
Read the ADCDRL register
Read the ADCDRH register. This clears EOC automatically.
Poll the EOC bit
Read the ADCDRH register. This clears EOC automatically.
is the maximum recommended impedance for an analog input signal. If the impedance
Select the CS[3:0] bits to assign the analog channel to convert.
AIN
AIN
) is greater than V
) is lower than V
Doc ID 12321 Rev 5
SSA
AREF
(low-level voltage reference) then the
(high-level voltage reference) then the
ST72344xx ST72345xx