AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 96
AT90PWM161
Manufacturer Part Number
AT90PWM161
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT90PWM161.pdf
(325 pages)
Specifications of AT90PWM161
Flash (kbytes)
16 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM161-16MN
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT90PWM161-WN
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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11.8
11.8.1
96
16-bit Timer/Counter Register Description
AT90PWM81
Timer/Counter1 Control Register B – TCCR1B
• Bit 7 – ICNC1: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is activated,
the input from the Input Capture pin (ICP1) is filtered. The filter function requires four successive equal
valued samples of the ICP1 pin for changing its output. The Input Capture is therefore delayed by four
Oscillator cycles when the noise canceler is enabled.
• Bit 6 – ICES1: Input Capture Edge Select
This bit selects which edge on the Input Capture pin (ICP1) that is used to trigger a capture event. When
the ICES1 bit is written to zero, a falling (negative) edge is used as trigger, and when the ICES1 bit is
written to one, a rising (positive) edge will trigger the capture.
When a capture is triggered according to the ICES1 setting, the counter value is copied into the Input Cap-
ture Register (ICR1). The event will also set the Input Capture Flag (ICF1), and this can be used to cause
an Input Capture Interrupt, if this interrupt is enabled.
When the ICR1 is used as TOP value (see description of the WGM13:0 bits located in the TCCR1A and
the TCCR1B Register), the ICP1 is disconnected and consequently the Input Capture function is disabled.
• Bit 5 – Reserved
• Bit 4 – WGM13: Waveform Generation Mode
See the table below for the modes definition
Table 11-1.
• Bit 3 – Reserved
• Bit 2:0 – CS12:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table 11-2.
Table 11-2.
Bit
Read/Write
Initial Value
Mode
CS12
12
0
0
0
0
0
WGM13
CS11
0
1
7
ICNC1
R/W
0
Waveform Generation Mode Bit Description
Clock Select Bit Description
0
0
1
1
Timer/Counter Mode of
Operation
Normal
CTC
CS10
6
ICES1
R/W
0
0
1
0
1
Description
No clock source (Timer/Counter stopped).
clk
Reserved
Reserved
5
-
R
0
I/O
/1 (No prescaling)
4
WGM13
R/W
0
3
-
R
0
TOP
0xFFFF
ICR1
R/W
2
CS12
0
TOV1 Flag
Set on
MAX
MAX
1
CS11
R/W
0
0
CS10
R/W
0
7734P–AVR–08/10
TCCR1B
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