PSB 21150 F V1.4 Infineon Technologies, PSB 21150 F V1.4 Datasheet - Page 196

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PSB 21150 F V1.4

Manufacturer Part Number
PSB 21150 F V1.4
Description
IC MODULAR ISDN NT INTELL TQFP64
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB 21150 F V1.4

Function
PC Adapter Circuit
Interface
HDLC, ISDN, SCI
Number Of Circuits
1
Voltage - Supply
3.3V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LFQFP
Includes
Activation and Deactivation, D-Channel Access Control, Monitor Channel Handler
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PSB21150FV1.4XT
PSB21150FV14NP
PSB21150FV14XP
SP000007575
SP000007577
IPAC-X
PSB/PSF 21150
Detailed Register Description
4.2.12
ISTATR - Interrupt Status Register Transceiver
Value after reset: 00
H
7
0
ISTATR
x
x
x
x
LD
RIC
SQC
SQW
RD (38)
For all interrupts in the ISTATR register the following logical states are defined:
0: Interrupt is not acitvated
1: Interrupt is acitvated
x ... Reserved
Bits set to “1” in this bit position must be ignored.
LD ... Level Detection
Any receive signal has been detected on the line. This bit is set to “1” (i.e. an interrupt is
generated if not masked) as long as any receiver signal is detected on the line.
RIC ... Receiver INFO Change
RIC is activated if one of the TR_STA bits RINF or ICV has changed. This bit is reset by
reading the TR_STA register.
SQC ... S/Q-Channel Change
A change in the received S-channel (TE) or Q-channel (NT) has been detected. The new
code can be read from the SQRxx bits of registers SQRR1-3 within the next multiframe
(5 ms). This bit is reset by a read access to the corresponding SQRRx register.
SQW ... S/Q-Channel Writable
The S/Q channel data for the next multiframe is writable.
The register for the Q (S) bits to be transmitted (received) has to be written (read) within
the next multiframe (5 ms). This bit is reset by writing register SQXRx.
Data Sheet
196
2003-01-30

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