PSB 21150 F V1.4 Infineon Technologies, PSB 21150 F V1.4 Datasheet - Page 138

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PSB 21150 F V1.4

Manufacturer Part Number
PSB 21150 F V1.4
Description
IC MODULAR ISDN NT INTELL TQFP64
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB 21150 F V1.4

Function
PC Adapter Circuit
Interface
HDLC, ISDN, SCI
Number Of Circuits
1
Voltage - Supply
3.3V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LFQFP
Includes
Activation and Deactivation, D-Channel Access Control, Monitor Channel Handler
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PSB21150FV1.4XT
PSB21150FV14NP
PSB21150FV14XP
SP000007575
SP000007577
DCL is activated such that its first rising edge occurs with the beginning of the bit
following the C/I (C/I0) channel.
After the clocks have been enabled this is indicated by the PU code in the C/I channel
and, consequently, by a CIC interrupt. The DU line may be released by resetting the
Software Power Up bit IOM_CR =’0’ and the C/I code written to CIX0 before (e.g. TIM or
AR8) is output on DU.
The IPAC-X supplies IOM-2 timing signals as long as there is no DIU command in the
C/I (C/I0) channel. If timing signals are no longer required and activation is not yet
requested, this is indicated by programming DIU in the CIX0 register.
Figure 78
Data Sheet
FSC
DU
DD
FSC
DU
DD
DCL
SPU = 1
Activation of the IOM-2 interface
0.2 to 4 ms
Note: The value “132 x DCL” is only valid for
IOM configurations with 3 IOM channels.
MR
MX
IOM -CH1
IOM
132 x DCL
R
R
-CH1
138
PU
IOM -CH2
IOM -CH2
R
R
Description of Functional Blocks
CIC : CIXO = TIM
Int.
PU
SPU = 0
B1
B1
TIM
PU
ITD09656
TIM
PU
PSB/PSF 21150
TIM
PU
2003-01-30
IPAC-X

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