MC68MH360EM25L Freescale Semiconductor, MC68MH360EM25L Datasheet - Page 418

• Manufacturer Part Number: MC68MH360EM25L
• Description: IC MPU QUICC ETHER 25MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Serial Interface with Time Slot Assigner
The QUICC supports the request-grant method for contention detection on the D channel of
the IDL basic rate. When the QUICC has data to transmit on the D channel, it asserts
L1RQx. The physical layer device monitors the physical layer bus for activity on the D chan-
nel and indicates that the channel is free by asserting L1GRx. The QUICC samples the
L1GRx signal when the IDL sync signal (L1RSYNCx) is asserted. If L1GRx is high (active),
the QUICC transmits the first zero of the opening flag in the first bit of the D channel. If a
collision is detected on the D channel, the physical layer device negates L1GRx. The QUICC
then stops its transmission and retransmits the frame when L1GRx is reasserted. This pro-
cedure is handled automatically for the first two buffers of a frame.
For the primary rate IDL, the QUICC can support up to four 8-bit channels in the frame,
determined by the programming of the SI RAM. To support more channels, the user can
route more than one channel to every SCC, which the SCC will treat as one high-speed
stream and store in the same data buffers (this approach is appropriate only for transparent
data). Additionally, the QUICC can be used to assert strobes for support of additional IDL
channels externally.
The IDL interface supports the CCITT I.460 recommendation for data rate adaptation, since
it can separately access each bit of the IDL bus. The current-route RAM specifies which bits
are supported by the IDL interface and by which serial controller. The receiver will receive
only the bits that are enabled by the receiver route RAM. The transmitter will transmit only
7-94
L1SYNC
L1SYNC
NOTE: L1RQx and L1GRx are not shown.
L1RXD
L1RXD
L1TXD
L1TXD
L1CLK
L1CLK
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 7-33. IDL Bus Signals
B1
B1
B1
MC68360 USER’S MANUAL
B1
Go to: www.freescale.com
D1
D1
10-BIT IDL
8-BIT IDL
B2
B2
B2
B2
(CLOCK NOT TO SCALE)
(CLOCK NOT TO SCALE)
D1
D1
D2
D2
D2
D2
MOTOROLA