L80227 LSI, L80227 Datasheet - Page 87

• Manufacturer Part Number: L80227
• Manufacturer: LSI

Specifications of L80227

• Lead Free Status / RoHS Status: Not Compliant

5.4 Register Structure
WRITE
PHYAD[4:0]
REGAD[4:0]
TA[1:0]
D[15:0]
The device has eight 16-bit registers. A map of the registers is shown in
Section 4.2, “MI Serial Port Register
Registers
The eight registers consist of six registers that are defined by IEEE 802.3
specifications (registers 0 to 5) and two registers that are unique to the
device (registers 17 and 18).
of each register
Register Structure
for a complete description of each register.
Write Select
When the WRITE bit is 1, it designates a write cycle.
Physical Device Address
When the PHYAD[4:0] bits match the inverted latched
value of the MDA[4:0]n pins, the device’s MI serial port is
selected for operation.
Register Address
The REGAD[4:0] bits determine the specific register to
access.
Turnaround Time
These bits provide some turnaround time for MDIO to
allow it to switch to a write input or read output, as
needed. When READ = 1, TA[1:0] = Z0; when
WRITE = 1, TA[1:0] = 0b10.
Data
These 16 bits contain data to or from one of the registers
selected with the register address bits REGAD[4:0].
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
Table 5.1
Summary”. See
gives a summary of the functions
Chapter 4,
R or W
R/W
5-5
W
W
W