L80227 LSI, L80227 Datasheet - Page 65

• Manufacturer Part Number: L80227
• Manufacturer: LSI

Specifications of L80227

• Lead Free Status / RoHS Status: Not Compliant

4.1
Bit Types
Chapter 4
Registers
This chapter contains a description of the registers accessed over the
management interface (MI) serial interface. It contains the following
sections:
For further information about the operation of the MI serial interface, see
Chapter 5, “Management Interface.”
Because the serial port is bidirectional (capable of both read and write
operations), there are many types of bits. The following bit type
definitions are summarized in
L80227 10BASE-T/100BASE-TX Ethernet PHY Technical Manual
Section 4.1, “Bit Types”
Section 4.2, “MI Serial Port Register Summary”
Section 4.3, “Registers”
Write bits (W) are inputs during a write cycle and are high
impedance during a read cycle
Read bits (R) are outputs during a read cycle and high impedance
during a write cycle
Read/Write bits (R/W) are actually write bits that can be read out
during a read cycle
R/WSC bits are R/W bits that are self-clearing after a set period of
time or after a specific event has completed
R/LL bits are read bits that latch themselves when they go LOW, and
they stay LOW until read. After they are read, they are reset HIGH.
R/LH bits are the same as R/LL bits, except that they latch HIGH.
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
Table
4.1:
4-1