L80227 LSI, L80227 Datasheet - Page 66

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L80227

Manufacturer Part Number
L80227
Description
Manufacturer
LSI
Datasheet

Specifications of L80227

Lead Free Status / RoHS Status
Not Compliant

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Table 4.1
4-2
Symbol
W
R
R/W
R/WSC
R/LL
R/LH
R/LT
Name
Write
Read
Read/Write
Read/Write,
Self-Clearing
Read/Latching
LOW
Read/Latching
HIGH
Read/Latching on
transition
MI Register Bit Type Definition
Registers
R/LT are read bits that latch themselves whenever they make a
transition or change value, and they stay latched until they are read.
After R/LT bits are read, they are updated to their current value.
Write Cycle
Input
No operation, Hi-Z
Input
Input
No operation, Hi-Z
No operation, Hi-Z
No operation, Hi-Z
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
Read Cycle
No operation, Hi-Z
Output
Output
Output
(clears itself after the operation completes)
Output
When the bit goes LOW, it is latched.
When the bit is read, it is updated.
Output
When the bit goes HIGH, it is latched.
When the bit Is read, it is updated.
Output
When the bit transitions, the bit is latched.
When the bit is read, the bit is updated.
Definition

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