CYIL1SM4000AA-GDC Cypress Semiconductor Corp, CYIL1SM4000AA-GDC Datasheet - Page 18

• Manufacturer Part Number: CYIL1SM4000AA-GDC
• Description: SENSOR IMAGE 4MP CMOS 127-PGA
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYIL1SM4000AA-GDC

• Package / Case: 127-PGA
• Pixel Size: 12µm x 12µm
• Active Pixel Array: 2048H x 2048V
• Frames Per Second: 15
• Voltage - Supply: 2.5V, 3.3V
• Operating Supply Voltage: 2.5 V
• Maximum Operating Temperature: + 60 C
• Minimum Operating Temperature: 0 C
• Image Size: 2048 H x 2048 V
• Color Sensing: Monochrome
• Package: 127CPGA
• Operating Temperature: 0 to 60 °C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: LUPA-4000-M; LUPA-4000-M

Figure 20
to 200 ns starting at the same time as pre_col and Norowsel. The
duration of Sh_col is equal to the ROT. The shorter this time the
shorter the ROT; however, this also lowers the dynamic range.
Precharging the Buses
This timing mode is similar to the mode without sample and hold, except that the prebus1 and prebus2 signals are activated. Note
that precharging of the buses can be combined with all the timing modes discussed earlier. The idea is to have a short pulse of about
5 ns to precharge the output buses to a known level. This mode makes the ghosting of bad columns impossible. In this mode, Nsf_load
must be made much larger (at least 1 MΩ).
Document Number: 38-05712 Rev. *F
shows this principle. Sh_col is now a pulse of 100 ns
pre_col (short pulse), Norowsel (short pulse) and Sh_col (large pulse)
Figure 21. X and Y Addressing with Precharging of Buses
Figure 20. Reduced Standard ROT with Sh_col Signal
If voltage-averaging is required, the sensor must work in this
mode with Sh_col signal and a voltage-averaging signal must be
generated after Sh_col drops and before the readout starts (see
Figure 16
on page 15)
CYIL1SM4000AA
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