C60K-CDR-A Omron, C60K-CDR-A Datasheet - Page 96

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C60K-CDR-A

Manufacturer Part Number
C60K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet

Specifications of C60K-CDR-A

Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Timer and Counter Instructions
0000
0500
Example 4:
One-shot Bits
0000
0204
0000
TIM 01
TIM 02
1000
1000 TIM 01
0500
0000
1000
0000
TIM 01
5.0 s
1.5 s
In the following example, 0500 would be turned ON 5.0 seconds after 0000
goes ON and then turned OFF 3.0 seconds after 0000 goes OFF. It is neces-
sary to use both 0500 and 0000 to determine the execution condition for TIM
02; 0000 in an normally closed condition is necessary to reset TIM 02 when
0000 goes ON and 0500 is necessary to activate TIM 02 when 0000 goes
OFF, setting 0500 by resetting TIM 01.
The length of time that a bit is kept ON or OFF can be controlled by combin-
ing TIM with OUT or OUT NOT. The following diagram demonstrates how
this is possible. In this example, 0204 would remain ON for 1.5 seconds after
0000 goes ON regardless of the time 0000 stays ON. This is achieved by
using 1000, activated by 0000, to turn ON 0204. When TIM 01 comes ON
(i.e., when the SV of TIM 01 has expired), 0204 will be turned OFF through
TIM 01 (i.e., TIM 01 will turn ON for an normally closed condition, creating an
OFF execution condition for OUT 0204). TIM 01 will also turn OFF 1000 the
next cycle, resetting the one-shot.
3.0 s
1.5 s
S
R
TIM 01
KEEP(11)
TIM 01
TIM 02
#0015
1000
0204
#0050
#0030
0500
1.5 s
5.0 s
3.0 s
Address Instruction
Address Instruction
0000
0001
0002
0003
0004
0005
0006
0007
0008
0000
0001
0002
0003
0004
0005
0006
0007
LD
AND NOT
OR
OUT
LD
TIM
LD
AND NOT
OUT
LD
TIM
LD
AND NOT
TIM
LD
LD
KEEP(11)
TIM
#
TIM
#
#
TIM
TIM
Section 5-11
Operands
Operands
1000
0000
1000
1000
0015
1000
0204
0000
0050
0500
0000
0030
0500
01
01
01
01
02
01
02
85

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