C60K-CDR-A Omron, C60K-CDR-A Datasheet - Page 140
C60K-CDR-A
Manufacturer Part Number
C60K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet
1.C28P-EDR-A.pdf
(225 pages)
Specifications of C60K-CDR-A
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Step Instructions
Precautions
Flags
Interlocks, jumps, SBN(92), and END(01) must not be used within step pro-
grams.
Bits used as control bits must not be used anywhere else in the program un-
less they are used to control the step (see example 3, below).
If IR bits are used for control bits, their status will be lost during any power
interruption. If it is necessary to maintain status to resume execution at the
same step, HR bits must be used.
1811:
Address
0000
0001
0002
0003
0004
0005
Step Start flag; turns ON for one cycle when STEP(08) is executed
and can be used to reset counters in steps as shown below if neces-
sary.
0000
0100
1811
Instruction
LD
SNXT(09)
STEP(08)
LD
LD
CNT
#
Operands
0000
1000
1000
0100
0003
1811
CP
R
01
STEP(08) 1000
SNXT(09) 1000
CNT 01
#0003
1000
1811
Start
Section 5-18
1 cycle
129
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