PIC18LF8490-I/PT Microchip Technology, PIC18LF8490-I/PT Datasheet - Page 283

• Manufacturer Part Number: PIC18LF8490-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8490-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

23.0
PIC18F6390/6490/8390/8490 devices include several
features intended to maximize reliability and minimize
cost through elimination of external components.
These are:
• Oscillator Selection
• Resets:
• Interrupts
• Watchdog Timer (WDT)
• Fail-Safe Clock Monitor
• Two-Speed Start-up
• Code Protection
• ID Locations
• In-Circuit Serial Programming™ (ICSP™)
The oscillator can be configured for the application
depending on frequency, power, accuracy and cost. All
of the options are discussed in detail in Section 2.0
“Oscillator Configurations”.
TABLE 23-1:
© 2007 Microchip Technology Inc.
300001h
300002h
300003h
300005h
300006h
300008h
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note 1:
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
File Name
SPECIAL FEATURES
OF THE CPU
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3H MCLRE
CONFIG4L
CONFIG5L
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition.
Shaded cells are unimplemented, read as ‘0’.
See Register 23-7 for DEVID values. DEVID registers are read-only and cannot be programmed by the user.
CONFIGURATION BITS AND DEVICE IDs
DEBUG
DEV10
DEV2
IESO
Bit 7
—
—
—
FCMEN
XINST
DEV1
DEV9
Bit 6
—
—
—
—
DEV0
DEV8
Bit 5
—
—
—
—
—
—
PIC18F6390/6490/8390/8490
WDTPS3 WDTPS2 WDTPS1 WDTPS0
BORV1
REV4
DEV7
Bit 4
—
—
—
—
FOSC3
BORV0
REV3
DEV6
A complete discussion of device Resets and interrupts
is available in previous sections of this data sheet.
In addition to their Power-up and Oscillator Start-up
Timers provided for Resets, PIC18F6390/6490/8390/
8490 devices have a Watchdog Timer, which is either
permanently enabled via the Configuration bits, or
software controlled (if configured as disabled).
The inclusion of an internal RC oscillator also provides
the additional benefits of a Fail-Safe Clock Monitor
(FSCM) and Two-Speed Start-up. FSCM provides for
background monitoring of the peripheral clock and
automatic switchover in the event of its failure. Two-
Speed Start-up enables code to be executed almost
immediately on start-up, while the primary clock source
completes its start-up delays.
All of these features are enabled and configured by
setting the appropriate Configuration register bits.
23.1
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select vari-
ous device configurations. These bits are mapped
starting at program memory location 300000h.
The user will note that address 300000h is beyond the
user program memory space. In fact, it belongs to the
configuration memory space (300000h-3FFFFFh),
which can only be accessed using table reads.
Bit 3
—
—
—
LPT1OSC
BOREN1 BOREN0 PWRTEN
Configuration Bits
FOSC2
REV2
DEV5
Bit 2
—
—
FOSC1
REV1
DEV4
Bit 1
—
—
—
CCP2MX
STVREN
WDTEN
FOSC0
REV0
DEV3
Bit 0
CP
DS39629C-page 281
Unprogrammed
00-- 0111
---1 1111
---1 1111
1--- -0-1
10-- ---1
---- ---1
xxxx xxxx
0000 xxxx
Default/
Value
(1)
(1)