PIC18LF8490-I/PT Microchip Technology, PIC18LF8490-I/PT Datasheet - Page 120

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PIC18LF8490-I/PT

Manufacturer Part Number
PIC18LF8490-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8490-I/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8490-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6390/6490/8390/8490
9.4
PORTD is an 8-bit wide, bidirectional port. The corre-
sponding Data Direction register is TRISD. Setting a
TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISD bit (= 0)
will make the corresponding PORTD pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
TABLE 9-7:
DS39629C-page 118
RD0/SEG0
RD1/SEG1
RD2/SEG2
RD3/SEG3
RD4/SEG4
RD5/SEG5
RD6/SEG6
RD7/SEG7
Legend:
Note:
Pin Name
PORTD, TRISD and
LATD Registers
On a Power-on Reset, these pins are
configured as digital inputs.
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
PORTD FUNCTIONS
Function
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
Setting
TRIS
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Buffer
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
ST
LATD<0> data output; disabled when LCD segment enabled.
PORTD<0> data input.
Segment 0 analog output for LCD.
LATD<1> data output; disabled when LCD segment enabled.
PORTD<1> data input.
Segment 1 analog output for LCD.
LATD<2> data output; disabled when LCD segment enabled.
PORTD<2> data input.
Segment 2 analog output for LCD.
LATD<3> data output; disabled when LCD segment enabled.
PORTD<3> data input.
Segment 3 analog output for LCD.
LATD<4> data output; disabled when LCD segment enabled.
PORTD<4> data input.
Segment 4 analog output for LCD module.
LATD<5> data output; disabled when LCD segment enabled.
PORTD<5> data input.
Segment 5 analog output for LCD.
LATD<6> data output; disabled when LCD segment enabled.
PORTD<6> data input.
Segment 6 analog output for LCD.
LATD<7> data output; disabled when LCD segment enabled.
PORTD<7> data input.
Segment 7 analog output for LCD.
PORTD is also multiplexed with LCD segment drives
controlled by the LCDSE0 register. I/O port functions
are only available when the segments are disabled.
EXAMPLE 9-4:
CLRF
CLRF
MOVLW
MOVWF
PORTD
LATD
0CFh
TRISD
Description
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
INITIALIZING PORTD
© 2007 Microchip Technology Inc.

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