PIC18LF8490-I/PT Microchip Technology, PIC18LF8490-I/PT Datasheet - Page 227

• Manufacturer Part Number: PIC18LF8490-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8490-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 17-5:
TABLE 17-5:
© 2007 Microchip Technology Inc.
INTCON
PIR3
PIE3
IPR3
RCSTA2
RCREG2
TXSTA2
SPBRG2
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
RX2 (pin)
Rcv Shift Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG2
RC2IF
(Interrupt Flag)
OERR bit
CREN
Note: This timing diagram shows three words appearing on the RX2 input. The RCREG2 (Receive Buffer register) is read after the third
Name
word causing the OERR (Overrun) bit to be set.
AUSART2 Receive Register
AUSART2 Baud Rate Generator Register
GIE/GIEH PEIE/GIEL TMR0IE
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
—
—
—
ASYNCHRONOUS RECEPTION
Start
bit
bit 0
LCDIF
LCDIE
LCDIP
Bit 6
RX9
TX9
bit 1
RC2IF
RC2IE
RC2IP
SREN
TXEN
Bit 5
bit 7/8
PIC18F6390/6490/8390/8490
Stop
INT0IE
bit
TX2IE
TX2IP
CREN
SYNC
TX2IF
Bit 4
Word 1
RCREG2
Start
bit
bit 0
ADDEN
RBIE
Bit 3
—
—
—
—
TMR0IF
bit 7/8 Stop
Word 2
RCREG2
BRGH
FERR
Bit 2
—
—
—
bit
INT0IF
Start
OERR
TRMT
Bit 1
bit
—
—
—
bit 7/8
RX9D
TX9D
DS39629C-page 225
RBIF
Bit 0
—
—
—
Stop
bit
on Page
Values
Reset
59
61
61
61
63
63
63
63