PIC18LF8490-I/PT Microchip Technology, PIC18LF8490-I/PT Datasheet - Page 129

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PIC18LF8490-I/PT

Manufacturer Part Number
PIC18LF8490-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8490-I/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8490-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
9.8
PORTH is an 8-bit wide, bidirectional I/O port. The cor-
responding Data Direction register is TRISH. Setting a
TRISH bit (= 1) will make the corresponding PORTH
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISH bit (= 0)
will make the corresponding PORTH pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATH) is also memory
mapped. Read-modify-write operations on the LATH
register read and write the latched output value for
PORTH.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
PORTH is also multiplexed with LCD segment drives
controlled by the LCDSE5 register. I/O port functions
are only available when the segments are disabled.
© 2007 Microchip Technology Inc.
Note:
Note:
PORTH, LATH and
TRISH Registers
PORTH is available only on 80-pin
devices.
On a Power-on Reset, these pins are
configured as digital inputs.
PIC18F6390/6490/8390/8490
EXAMPLE 9-8:
CLRF
CLRF
MOVLW
MOVWF
PORTH
LATH
0CFh
TRISH
INITIALIZING PORTH
; Initialize PORTH by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs
DS39629C-page 127

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