PIC18LF2685-I/SO Microchip Technology, PIC18LF2685-I/SO Datasheet - Page 54

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PIC18LF2685-I/SO

Manufacturer Part Number
PIC18LF2685-I/SO
Description
96KB Flash, 3KB RAM, ECAN, 1024 EEPROM 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2685-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF2685-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2682/2685/4682/4685
TABLE 4-4:
DS39761C-page 54
PIR2
PIE2
IPR1
PIR1
PIE1
OSCTUNE
TRISE
TRISD
TRISC
TRISB
TRISA
LATE
LATD
LATC
LATB
LATA
PORTE
PORTD
PORTC
PORTB
PORTA
ECANCON
TXERRCNT
RXERRCNT
COMSTAT
CIOCON
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
Register
(5)
2:
3:
4:
5:
6:
(5)
(5)
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
2682 2685 4682 4685
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INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
Brown-out Reset
Power-on Reset,
00-0 0000
0--0 000-
00-0 0000
0--0 000-
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
0q-0 0000
0000 -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- x000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xx0x 0000
0001 0000
0000 0000
0000 0000
0000 0000
--00 ----
(5)
(5)
(5)
RESET Instruction,
MCLR Resets,
Stack Resets
00-0 0000
0--0 000-
00-0 0000
0--0 000-
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
0q-0 0000
0000 -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- x000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uu0u 0000
0001 0000
0000 0000
0000 0000
0000 0000
--00 ----
WDT Reset,
(5)
(5)
(5)
© 2009 Microchip Technology Inc.
Wake-up via WDT
uu-u uuuu
u--u uuu-
uu-u uuuu
u--u uuu-
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uu-u uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu ----
or Interrupt
(1)
(1)
(1)
(5)
(5)
(5)

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