PIC18LF2685-I/SO Microchip Technology, PIC18LF2685-I/SO Datasheet - Page 266

• Manufacturer Part Number: PIC18LF2685-I/SO
• Description: 96KB Flash, 3KB RAM, ECAN, 1024 EEPROM 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2685-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2682/2685/4682/4685
FIGURE 21-1:
21.2
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 21-1) keep CV
reference source rails. The voltage reference is derived
from the reference source; therefore, the CV
changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in Section 27.0 “Electrical Characteristics”.
21.3
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
DS39761C-page 266
Voltage Reference Accuracy/Error
Operation During Sleep
CVRR
V
V
CVREN
V
REF
REF
DD
COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
+
-
REF
CVRSS = 0
CVRSS = 1
from approaching the
CVRSS = 1
CVRSS = 0
16 Steps
REF
output
8R
R
R
R
R
R
R
R
clearing bit CVREN (CVRCON<7>). This Reset also
disconnects the reference from the RA0 pin by clearing
voltage range by clearing bit, CVRR (CVRCON<5>).
21.4
A device Reset disables the voltage reference by
bit, CVROE (CVRCON<6>), and selects the high-
The CVR value select bits are also cleared.
21.5
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RA0 pin if the
TRISA<0> bit and the CVROE bit are both set. Enabling
the voltage reference output onto the RA0 pin, with an
input signal present, will increase current consumption.
Connecting RA0 as a digital output with CVRSS enabled
will also increase current consumption.
The RA0 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, a buffer must be used on the voltage
reference output for external connections to V
Figure 21-2 shows an example buffering technique.
8R
Effects of a Reset
Connection Considerations
CVR3:CVR0
© 2009 Microchip Technology Inc.
CV
REF
REF
.