PIC18LF2685-I/SO Microchip Technology, PIC18LF2685-I/SO Datasheet - Page 473

• Manufacturer Part Number: PIC18LF2685-I/SO
• Description: 96KB Flash, 3KB RAM, ECAN, 1024 EEPROM 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2685-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ID Locations ............................................................. 345, 364
INCF ................................................................................. 386
INCFSZ ............................................................................ 387
In-Circuit Debugger .......................................................... 364
In-Circuit Serial Programming (ICSP) ...................... 345, 364
Indexed Literal Offset Addressing Mode .......................... 412
Indirect Addressing ............................................................ 91
INFSNZ ............................................................................ 387
Initialization Conditions for All Registers ...................... 51–62
Instruction Cycle ................................................................ 67
Instruction Set .................................................................. 365
© 2009 Microchip Technology Inc.
Master Mode ............................................................ 213
Multi-Master Communication, Bus Collision and Arbitra-
Multi-Master Mode ................................................... 223
Operation ................................................................. 202
Read/Write Bit Information (R/W Bit) ............... 202, 203
Registers .................................................................. 198
Serial Clock (RC3/SCK/SCL) ................................... 203
Slave Mode .............................................................. 202
Sleep Operation ....................................................... 223
Stop Condition Timing .............................................. 222
and Standard PIC18 Instructions ............................. 412
Clocking Scheme ....................................................... 67
Flow/Pipelining ........................................................... 67
ADDLW .................................................................... 371
ADDWF .................................................................... 371
ADDWF (Indexed Literal Offset Mode) .................... 413
ADDWFC ................................................................. 372
ANDLW .................................................................... 372
ANDWF .................................................................... 373
BC ............................................................................ 373
BCF .......................................................................... 374
BN ............................................................................ 374
BNC ......................................................................... 375
BNN ......................................................................... 375
BNOV ....................................................................... 376
BNZ .......................................................................... 376
BOV ......................................................................... 379
BRA .......................................................................... 377
BSF .......................................................................... 377
BSF (Indexed Literal Offset Mode) .......................... 413
BTFSC ..................................................................... 378
BTFSS ..................................................................... 378
BTG .......................................................................... 379
BZ ............................................................................ 380
CALL ........................................................................ 380
CLRF ........................................................................ 381
CLRWDT .................................................................. 381
COMF ...................................................................... 382
CPFSEQ .................................................................. 382
CPFSGT .................................................................. 383
CPFSLT ................................................................... 383
DAW ......................................................................... 384
DCFSNZ .................................................................. 385
Operation ......................................................... 214
Reception ......................................................... 219
Repeated Start Condition Timing ..................... 218
Start Condition ................................................. 217
Transmission ................................................... 219
Transmit Sequence .......................................... 214
tion ................................................................... 223
Addressing ....................................................... 202
Reception ......................................................... 203
Transmission ................................................... 203
PIC18F2682/2685/4682/4685
INTCON Register
INTCON Registers ........................................................... 117
Inter-Integrated Circuit. See I
Internal Oscillator Block ..................................................... 28
Internal RC Oscillator
Internet Address .............................................................. 481
DECF ....................................................................... 384
DECFSZ .................................................................. 385
Extended Instructions .............................................. 407
General Format ....................................................... 367
GOTO ...................................................................... 386
INCF ........................................................................ 386
INCFSZ .................................................................... 387
INFSNZ .................................................................... 387
IORLW ..................................................................... 388
IORWF ..................................................................... 388
LFSR ....................................................................... 389
MOVF ...................................................................... 389
MOVFF .................................................................... 390
MOVLB .................................................................... 390
MOVLW ................................................................... 391
MOVWF ................................................................... 391
MULLW .................................................................... 392
MULWF ................................................................... 392
NEGF ....................................................................... 393
NOP ......................................................................... 393
Opcode Field Descriptions ...................................... 366
POP ......................................................................... 394
PUSH ....................................................................... 394
RCALL ..................................................................... 395
RESET ..................................................................... 395
RETFIE .................................................................... 396
RETLW .................................................................... 396
RETURN .................................................................. 397
RLCF ....................................................................... 397
RLNCF ..................................................................... 398
RRCF ....................................................................... 398
RRNCF .................................................................... 399
SETF ....................................................................... 399
SETF (Indexed Literal Offset Mode) ........................ 413
SLEEP ..................................................................... 400
Standard Instructions ............................................... 365
SUBFWB ................................................................. 400
SUBLW .................................................................... 401
SUBWF .................................................................... 401
SUBWFB ................................................................. 402
SWAPF .................................................................... 402
TBLRD ..................................................................... 403
TBLWT .................................................................... 404
TSTFSZ ................................................................... 405
XORLW ................................................................... 405
XORWF ................................................................... 406
Summary Table ....................................................... 368
RBIF Bit ................................................................... 134
Adjustment ................................................................. 28
Frequency Drift .......................................................... 28
INTIO Modes ............................................................. 28
INTOSC Output Frequency ....................................... 28
OSCTUNE Register ................................................... 28
Use with WDT .......................................................... 355
and Using MPLAB Tools ................................. 414
Considerations when Enabling ........................ 412
Syntax ............................................................. 407
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DS39761C-page 473