PIC18LF2685-I/SO Microchip Technology, PIC18LF2685-I/SO Datasheet - Page 128

• Manufacturer Part Number: PIC18LF2685-I/SO
• Description: 96KB Flash, 3KB RAM, ECAN, 1024 EEPROM 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2685-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2682/2685/4682/4685
REGISTER 9-12:
DS39761C-page 128
Mode 0
Mode 1,2
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
In CAN Mode 1 and 2, these bits are forced to ‘0’.
bit 7
IRXIP: CAN Invalid Received Message Interrupt Priority bit
1 = High priority
0 = Low priority
WAKIP: CAN bus Activity Wake-up Interrupt Priority bit
1 = High priority
0 = Low priority
ERRIP: CAN bus Error Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 0:
TXB2IP: CAN Transmit Buffer 2 Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 1 or 2:
TXBnIP: CAN Transmit Buffer Interrupt Priority bit
1 = High priority
0 = Low priority
TXB1IP: CAN Transmit Buffer 1 Interrupt Priority bit
1 = High priority
0 = Low priority
TXB0IP: CAN Transmit Buffer 0 Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 0:
RXB1IP: CAN Receive Buffer 1 Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 1 or 2:
RXBnIP: CAN Receive Buffer Interrupts Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 0:
RXB0IP: CAN Receive Buffer 0 Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 1:
Unimplemented: Read as ‘0’
When CAN is in Mode 2:
FIFOWMIP: FIFO Watermark Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
R/W-1
IRXIP
IRXIP
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
WAKIP
WAKIP
R/W-1
R/W-1
W = Writable bit
‘1’ = Bit is set
ERRIP
ERRIP
R/W-1
R/W-1
TXB2IP
TXBnIP
R/W-1
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
(1)
TXB1IP
TXB1IP
R/W-1
R/W-1
(1)
(1)
TXB0IP
TXB0IP
R/W-1
R/W-1
(1)
(1)
© 2009 Microchip Technology Inc.
x = Bit is unknown
RXB1IP
RXBnIP
R/W-1
R/W-1
FIFOWMIP
RXB0IP
R/W-1
R/W-1
bit 0