PIC18LF2685-I/SO Microchip Technology, PIC18LF2685-I/SO Datasheet - Page 469

• Manufacturer Part Number: PIC18LF2685-I/SO
• Description: 96KB Flash, 3KB RAM, ECAN, 1024 EEPROM 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2685-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

INDEX
A
A/D ................................................................................... 249
Absolute Maximum Ratings ............................................. 419
AC (Timing) Characteristics ............................................. 435
ACKSTAT ........................................................................ 219
ACKSTAT Status Flag ..................................................... 219
ADCON0 Register ............................................................ 249
ADCON1 Register ............................................................ 249
ADCON2 Register ............................................................ 249
ADDFSR .......................................................................... 408
ADDLW ............................................................................ 371
ADDULNK ........................................................................ 408
ADDWF ............................................................................ 371
ADDWFC ......................................................................... 372
ADRESH Register ............................................................ 249
ADRESL Register .................................................... 249, 252
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 372
ANDWF ............................................................................ 373
Assembler
B
Baud Rate Generator ....................................................... 215
BC .................................................................................... 373
BCF .................................................................................. 374
BF .................................................................................... 219
BF Status Flag ................................................................. 219
Bit Timing Configuration Registers
Block Diagrams
© 2009 Microchip Technology Inc.
Acquisition Requirements ........................................ 254
ADCON0 Register .................................................... 249
ADCON1 Register .................................................... 249
ADCON2 Register .................................................... 249
ADRESH Register ............................................ 249, 252
ADRESL Register .................................................... 249
Analog Port Pins, Configuring .................................. 256
Associated Registers ............................................... 258
Automatic Acquisition Time ...................................... 255
Configuring the Module ............................................ 253
Conversion Clock (T
Conversion Requirements ....................................... 454
Conversion Status (GO/DONE Bit) .......................... 252
Conversions ............................................................. 257
Converter Characteristics ........................................ 453
Converter Interrupt, Configuring .............................. 253
Operation in Power-Managed Modes ...................... 256
Special Event Trigger (ECCP1) ....................... 176, 258
Use of the ECCP1 Trigger ....................................... 258
Load Conditions for Device
Parameter Symbology ............................................. 435
Temperature and Voltage Specifications ................. 436
Timing Conditions .................................................... 436
GO/DONE Bit ........................................................... 252
MPASM Assembler .................................................. 416
BRGCON1 ............................................................... 340
BRGCON2 ............................................................... 340
BRGCON3 ............................................................... 340
A/D ........................................................................... 252
Analog Input Model .................................................. 253
Baud Rate Generator ............................................... 215
CAN Buffers and Protocol Engine ............................ 276
Capture Mode Operation ......................................... 168
Timing Specifications ....................................... 436
AD
) ........................................... 255
PIC18F2682/2685/4682/4685
BN .................................................................................... 374
BNC ................................................................................. 375
BNN ................................................................................. 375
BNOV .............................................................................. 376
BNZ ................................................................................. 376
BOR. See Brown-out Reset.
BOV ................................................................................. 379
BRA ................................................................................. 377
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 46
BSF .................................................................................. 377
BTFSC ............................................................................. 378
BTFSS ............................................................................. 378
BTG ................................................................................. 379
BZ .................................................................................... 380
C
C Compilers
CALL ................................................................................ 380
CALLW ............................................................................ 409
Comparator Analog Input Model .............................. 263
Comparator I/O Operating Modes ........................... 260
Comparator Output .................................................. 262
Comparator Voltage Reference ............................... 266
Comparator Voltage Reference Output
Compare Mode Operation ....................................... 169
Device Clock .............................................................. 30
Enhanced PWM ....................................................... 177
EUSART Receive .................................................... 240
EUSART Transmit ................................................... 238
External Power-on Reset Circuit
Fail-Safe Clock Monitor ........................................... 358
Generic I/O Port Operation ...................................... 131
High/Low-Voltage Detect with External Input .......... 270
Interrupt Logic .......................................................... 116
MSSP (I
MSSP (I
MSSP (SPI Mode) ................................................... 189
On-Chip Reset Circuit ................................................ 43
PIC18F2682/2685 ..................................................... 12
PIC18F4682/4685 ..................................................... 13
PLL (HS Mode) .......................................................... 27
PORTD and PORTE (Parallel Slave Port) ............... 146
PWM Operation (Simplified) .................................... 171
Reads from Flash Program Memory ....................... 101
Single Comparator ................................................... 261
Table Read Operation ............................................... 97
Table Write Operation ............................................... 98
Table Writes to Flash Program Memory .................. 103
Timer0 in 16-Bit Mode ............................................. 150
Timer0 in 8-Bit Mode ............................................... 150
Timer1 ..................................................................... 154
Timer1 (16-Bit Read/Write Mode) ............................ 154
Timer2 ..................................................................... 160
Timer3 ..................................................................... 162
Timer3 (16-Bit Read/Write Mode) ............................ 162
Watchdog Timer ...................................................... 355
Detecting ................................................................... 46
Disabling in Sleep Mode ............................................ 46
Software Enabled ...................................................... 46
MPLAB C18 ............................................................. 416
Buffer Example ................................................ 267
(Slow V
2
2
C Master Mode) ........................................ 213
C Mode) .................................................... 198
DD
Power-up) ........................................ 45
DS39761C-page 469