PIC18LF2685-I/SO Microchip Technology, PIC18LF2685-I/SO Datasheet - Page 276

• Manufacturer Part Number: PIC18LF2685-I/SO
• Description: 96KB Flash, 3KB RAM, ECAN, 1024 EEPROM 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2685-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2682/2685/4682/4685
FIGURE 23-1:
DS39761C-page 276
BUFFERS
Message
PROTOCOL
ENGINE
Control
Queue
TXB0
Transmit
Logic
TX
CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM
{Transmit<5:0>, Receive<8:0>}
Transmit Byte Sequencer
TXB1
Shift<14:0>
Transmit<7:0>
Transmit Option
TXB2
CRC<14:0>
Comparator
Receive<8:0>
A
c
c
e
p
t
MODE 1, 2
MESSAGE
6 TX/RX
MODE 0
BUFFERS
Buffers
Buffers
2 RX
Acceptance Filters
Acceptance Filters
(RXF06-RXF15)
(RXF0-RXF05)
MODE 1, 2
MODE 0
Timing
Logic
Data Field
Bit
RX
Identifier
16 – 4 to 1 MUXs
© 2009 Microchip Technology Inc.
M
RXF15
A
B
Transmit
Machine
Receive
Protocol
Counter
Counter
Configuration
Finite
Error
Error
State
Generator
Registers
Clock
V
CC
REC
TEC
Err-Pas
Bus-Off
Rcv Byte