PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 366

• Manufacturer Part Number: PIC18F85K22-I/PT
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F85K22-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 69
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Core Size: 8 Bit
• Program Memory Size: 32KB
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
TABLE 23-2:
DS39960D-page 366
INTCON
PIR1
PIE1
IPR1
PIR3
PIE3
IPR3
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
ANCON0
ANCON1
ANCON2
CCP2CON
PORTA
TRISA
PORTF
TRISF
PORTG
TRISG
PORTH
TRISH
PMD0
Legend:
Note 1:
Name
2:
3:
(1)
(1)
This register is not implemented on 64-pin devices.
These bits are available only in certain oscillator modes, when the FOSC2 Configuration bit = 0 . If that
Configuration bit is cleared, this signal is not implemented.
This bit is available when Master Clear is disabled (MCLRE = 0 ). When MCLRE is set, the bit is
unimplemented.
— = unimplemented, read as ‘ 0 ’. Shaded cells are not used for A/D conversion.
A/D Result Register High Byte
A/D Result Register Low Byte
TMR5GIP
TRIGSEL1
TRISA7
GIE/GIEH
TMR5GIF
TMR5GIE
ANSEL15
ANSEL23
CCP3MD
ANSEL7
TRISH7
TRISF7
REGISTERS ASSOCIATED WITH A/D MODULE
PSPIF
PSPIE
PSPIP
RA7
ADFM
P2M1
Bit 7
RH7
RF7
—
—
—
(2)
(2)
PEIE/GIEL
TRIGSEL0
TRISA6
ANSEL14
ANSEL22
CCP2MD
ANSEL6
TRISH6
TRISF6
RA6
CHS4
P2M0
ADIE
ADIP
Bit 6
ADIF
RH6
RF6
—
—
—
—
—
—
(2)
(2)
ANSEL13
ANSEL21
CCP1MD
ANSEL5
TMR0IE
TRISH5
TRISA5
TRISF5
VCFG1
ACQT2
DC2B1
RG5
RC1IF
RC1IE
RC1IP
RC2IF
RC2IE
RC2IP
CHS3
Bit 5
RA5
RF5
RH5
—
(3)
UART2MD UART1MD
ANSEL12
ANSEL20
ANSEL4
TRISA4
TRISG4
TRISH4
TRISF4
VCFG0
ACQT1
INT0IE
DC2B0
TX1IF
TX1IE
TX1IP
TX2IF
TX2IE
TX2IP
CHS2
Bit 4
RG4
RA4
RF4
RH4
ANSEL11
ANSEL19
CCP2M3
CTMUIF
CTMUIE
CTMUIP
ANSEL3
SSP1IE
SSP1IP
VNCFG
TRISA3
TRISG3
TRISH3
SSP1IF
TRISF3
ACQT0
CHS1
RBIE
Bit 3
RG3
RH3
RA3
RF3
TMR1GIE
TMR1GIP
TMR1GIF
ANSEL10
ANSEL18
CCP2M2
SSP2MD
ANSEL2
TMR0IF
CCP2IE
CCP2IP
TRISG2
CCP2IF
TRISA2
TRISH2
CHSN2
TRISF2
ADCS2
 2009-2011 Microchip Technology Inc.
CHS0
Bit 2
RG2
RH2
RA2
RF2
GO/DONE
ANSEL17
CCP2M1
SSP1MD
ANSEL1
ANSEL9
TMR2IF
TMR2IE
TMR2IP
CCP1IE
CCP1IP
TRISG1
CCP1IF
TRISA1
TRISH1
CHSN1
ADCS1
TRISF1
INT0IF
Bit 1
RG1
RH1
RA1
RF1
ANSEL16
CCP2M0
ANSEL0
ANSEL8
TMR1IF
TMR1IE
TMR1IP
RTCCIF
RTCCIE
RTCCIP
TRISG0
ADCMD
TRISA0
TRISH0
CHSN0
ADCS0
ADON
RBIF
Bit 0
RG0
RH0
RA0
—
—