PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 150

• Manufacturer Part Number: PIC18F85K22-I/PT
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F85K22-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 69
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Core Size: 8 Bit
• Program Memory Size: 32KB
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
REGISTER 11-8:
DS39960D-page 150
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
TMR7GIF
R/W-0
Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
(1)
TMR7GIF: TMR7 Gate Interrupt Flag bits
1 = TMR gate interrupt occurred (bit must be cleared in software)
0 = No TMR gate interrupt occurred
TMR12IF: TMR12 to PR12 Match Interrupt Flag bit
1 = TMR12 to PR12 match occurred (must be cleared in software)
0 = No TMR12 to PR12 match occurred
TMR10IF: TMR10 to PR10 Match Interrupt Flag bit
1 = TMR10 to PR10 match occurred (must be cleared in software)
0 = No TMR10 to PR10 match occurred
TMR8IF: TMR8 to PR8 Match Interrupt Flag bit
1 = TMR8 to PR8 match occurred (must be cleared in software)
0 = No TMR8 to PR8 match occurred
TMR7IF: TMR7 Overflow Interrupt Flag bit
1 = TMR7 register overflowed (must be cleared in software)
0 = TMR7 register did not overflow
TMR6IF: TMR6 to PR6 Match Interrupt Flag bit
1 = TMR6 to PR6 match occurred (must be cleared in software)
0 = No TMR6 to PR6 match occurred
TMR5IF: TMR5 Overflow Interrupt Flag bit
1 = TMR5 register overflowed (must be cleared in software)
0 = TMR5 register did not overflow
TMR4IF: TMR4 to PR4 Match Interrupt Flag bit
1 = TMR4 to PR4 match occurred (must be cleared in software)
0 = No TMR4 to PR4 match occurred
TMR12IF
R/W-0
PIR5: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 5
(1)
W = Writable bit
‘1’ = Bit is set
TMR10IF
R/W-0
(1)
TMR8IF
R/W-0
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TMR7IF
R/W-0
(1)
(1)
(1)
TMR6IF
R/W-0
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x = Bit is unknown
TMR5IF
R/W-0
TMR4IF
R/W-0
bit 0