CLRC63201T/0FE,112 NXP Semiconductors, CLRC63201T/0FE,112 Datasheet - Page 46

IC I.CODE HS READER 32-SOIC

CLRC63201T/0FE,112

Manufacturer Part Number
CLRC63201T/0FE,112
Description
IC I.CODE HS READER 32-SOIC
Manufacturer
NXP Semiconductors
Series
I-Coder
Datasheets

Specifications of CLRC63201T/0FE,112

Rf Type
Read Only
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B, ISO15693, ISO18000-3
Package / Case
32-SOIC (0.300", 7.50mm Width)
Product
RFID Readers
Operating Temperature Range
- 25 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2199-5
935269690112
CLRC632
CLRC63201TD

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CLRC63201T/0FE,112
Manufacturer:
IR
Quantity:
3 400
Part Number:
CLRC63201T/0FE,112
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 39.
CLRC632_35
Product data sheet
PUBLIC
Sub
address
(Hex)
Page 4: RF Timing and channel redundancy
20h
21h
22h
23h
24h
25h
26h
27h
Page 5: FIFO, timer and IRQ pin configuration
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
Page 6: reserved registers
30h
31h
32h
33h
34h
35h
36h
37h
Page 7: Test control
38h
39h
3Ah
3Bh
3Ch
3Dh
3Eh
3Fh
Register name
Page
RxWait
ChannelRedundancy
CRCPresetLSB
CRCPresetMSB
TimeSlotPeriod
MFOUTSelect
PreSet27
Page
FIFOLevel
TimerClock
TimerControl
TimerReload
IRQPinConfig
PreSet2E
PreSet2F
Page
reserved
reserved
reserved
reserved
reserved
reserved
reserved
Page
reserved
TestAnaSelect
reserved
reserved
TestDigiSelect
reserved
reserved
CLRC632 register overview
10.4 CLRC632 register flags overview
Function
selects the page register
selects the interval after transmission before the receiver starts
selects the method and mode used to check data integrity on
the RF channel
preset LSB value for the CRC register
preset MSB value for the CRC register
selects the time between automatically transmitted frames
selects internal signal applied to pin MFOUT, includes the MSB
of value TimeSlotPeriod; see
these values are not changed
selects the page register
defines the FIFO buffer overflow and underflow warning levels
selects the timer clock divider
selects the timer start and stop conditions
defines the timer preset value
configures pin IRQ output stage
these values are not changed
these values are not changed
selects the page register
reserved
reserved
reserved
reserved
reserved
reserved
reserved
selects the page register
reserved
selects analog test mode
reserved
reserved
selects digital test mode
reserved
reserved
…continued
Rev. 3.5 — 10 November 2009
Multiple protocol contactless reader IC (MIFARE/I-CODE1)
073935
Table 107 on page 69
Refer to
Table 41 on page 50
Table 99 on page 68
Table 101 on page 68
Table 103 on page 69
Table 105 on page 69
Table 107 on page 69
Table 109 on page 70
Table 111 on page 70
Table 41 on page 50
Table 49 on page 52
Table 114 on page 71
Table 116 on page 72
Table 118 on page 72
Table 120 on page 73
Table 122 on page 73
Table 123 on page 73
Table 41 on page 50
Table 124 on page 73
Table 41 on page 50
Table 125 on page 74
Table 126 on page 74
Table 128 on page 75
Table 129 on page 75
Table 130 on page 75
Table 132 on page 76
CLRC632
© NXP B.V. 2009. All rights reserved.
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