R5F21294SNSP#U0 Renesas Electronics America, R5F21294SNSP#U0 Datasheet - Page 43

• Manufacturer Part Number: R5F21294SNSP#U0
• Description: MCU 3/5V 16K+2K 20PIN-SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/29r

Specifications of R5F21294SNSP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/28 Group, R8C/29 Group
Rev.2.10
REJ09B0279-0210
Table 5.2 shows the Pin Functions while RESET Pin Level is “L”, Figure 5.3 shows the CPU Register Status after
Reset, Figure 5.4 shows the Reset Sequence, and Figure 5.5 shows the OFS Register.
Figure 5.3
Figure 5.4
Table 5.2
P1
P3_3 to P3_5, P3_7
P4_2, P4_5 to P4_7
Internal reset
signal
Address
(internal address
signal)
CPU clock
RESET pin
fOCO-S
NOTES:
Sep 26, 2008
1. Hardware reset.
2. When the “L” input width to the RESET pin is set to fOCO-S clock × 32 cycles or more, setting the RESET pin to “H” also sets the internal
reset signal to “H” at the same.
Pin Name
CPU Register Status after Reset
Reset Sequence
Pin Functions while RESET Pin Level is “L”
10 cycles or more are needed
b15
fOCO-S clock × 32 cycles
IPL
b19
Content of addresses 0FFFEh to 0FFFCh
Page 24 of 441
Start time of flash memory
(CPU clock × 14 cycles)
b15
b15
b15
Input port
Input port
Input port
(1)
b8
(2)
00000h
U
b7
I
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
O
Pin Functions
CPU clock × 28 cycles
B
S
Z
D
C
b0
b0
b0
b0
b0
0FFFCh
User stack pointer(USP)
Interrupt stack pointer(ISP)
Static base register(SB)
Flag register(FLG)
Data register(R0)
Data register(R1)
Data register(R2)
Data register(R3)
Address register(A0)
Address register(A1)
Frame base register(FB)
Interrupt table register(INTB)
Program counter(PC)
0FFFDh
0FFFEh
Content of reset vector
5. Resets