R5F21294SNSP#U0 Renesas Electronics America, R5F21294SNSP#U0 Datasheet - Page 228

• Manufacturer Part Number: R5F21294SNSP#U0
• Description: MCU 3/5V 16K+2K 20PIN-SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/29r

Specifications of R5F21294SNSP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/28 Group, R8C/29 Group
Rev.2.10
REJ09B0279-0210
Figure 14.56
Table 14.23
j = A, B, C, or D
BFC, BFD: Bits in TRCMR register
NOTE:
TRCGRA
TRCGRB
TRCGRC
TRCGRD
TRCGRD
Timer RC Control Register 1
b7 b6 b5 b4
NOTES:
Register
1. Do not set the TRCGRB and TRCGRC registers to the same value.
1.
2.
Set to these bits w hen the TSTART bit in the TRCMR register is set to 0 (count stops).
If the pin function is set for w aveform output (refer to Table 7.7 and Table 7.8), the initial output level is output
w hen the TRCCR1 register is set.
Sep 26, 2008
b3 b2
−
−
BFC = 0
BFD = 0
BFD = 1
TRCCR1 Register in PWM2 Mode
Functions of TRCGRj Register in PWM2 Mode
b1 b0
Setting
Bit Symbol
TRCCR1
Symbol
CCLR
TCK0
TCK1
TCK2
TOA
TOB
TOC
TOD
Page 209 of 441
General register. Set the PWM period.
General register. Set the PWM output change point.
General register. Set the PWM output change point (wait time
after trigger).
(Not used in PWM2 mode)
Buffer register. Set the next PWM output change point. (Refer to
14.3.3.2 Buffer Operation .)
TRCIOA output level select bit
TRCIOB output level select bit
TRCIOC output level select bit
TRCIOD output level select bit
Count source select bits
TRC counter clear select bit
Address
Bit Name
0121h
Register Function
(1)
(1, 2)
(1)
(1)
(1)
b6 b5 b4
0 0 0 : f1
0 0 1 : f2
0 1 0 : f4
0 1 1 : f8
1 0 0 : f32
1 0 1 : TRCCLK input rising edge
1 1 0 : fOCO40M
1 1 1 : Do not set.
Disabled in the PWM2 mode
0 : Active level “H”
1 : Active level “L”
Disabled in the PWM2 mode
0 : Disable clear (free-running operation)
1 : Clear by compare match in the
(Initial output “L”
“H” output by compare match in the
TRCGRC register
“L” output by compare match in the
TRCGRB register
(Initial output “H”
“L” output by compare match in the
TRCGRC register
“H” output by compare match in the
TRCGRB register
TRCGRA register
After Reset
Function
00h
TRCIOB pin
−
TRCIOB pin
PWM2 Output Pin
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW