R5F21294SNSP#U0 Renesas Electronics America, R5F21294SNSP#U0 Datasheet - Page 243

• Manufacturer Part Number: R5F21294SNSP#U0
• Description: MCU 3/5V 16K+2K 20PIN-SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/29r

Specifications of R5F21294SNSP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/28 Group, R8C/29 Group
Rev.2.10
REJ09B0279-0210
Figure 14.71
14.4.2
Table 14.27
NOTE:
fC4
Count sources
Count operations
Count period
Count start condition
Count stop condition
Interrupt request
generation timing
Read from timer
Write to timer
Select functions
f32
f4
f8
(1)
1. For J, K version, fC4 cannot be selected.
NOTE:
1. For J, K version, fC4 cannot be selected.
In output compare mode, the internal count source divided by 2 is counted using the 4-bit or 8-bit counter and
compare value match is detected with the 8-bit counter. Figure 14.71 shows a Block Diagram of Output
Compare Mode and Table 14.27 lists the Specifications of Output Compare Mode. Figures 14.72 to 14.76 show
the registers associated with output compare mode, and Figure 14.77 shows the Operating Example in Output
Compare Mode.
TRERST, TOENA: Bits in TRECR1 register
COMIE: Bit in TRECR2 register
RCS0 to RCS2: Bits in TRECSR register
Sep 26, 2008
= 01b
= 10b
Output Compare Mode
= 11b
RCS1 to RCS0
= 00b
Item
Block Diagram of Output Compare Mode
Specifications of Output Compare Mode
Page 224 of 441
1/2
f4, f8, f32, fC4
• Increment
• When the 8-bit counter content matches with the TREMIN register content,
• When RCS2 = 0 (4-bit counter is not used)
• When RCS2 = 1 (4-bit counter is used)
fi: Frequency of count source
n: Setting value of TREMIN register
1 (count starts) is written to the TSTART bit in the TRECR1 register
0 (count stops) is written to the TSTART bit in the TRECR1 register
When the 8-bit counter content matches with the TREMIN register content
When reading the TRESEC register, the 8-bit counter value can be read.
When reading the TREMIN register, the compare value can be read.
Writing to the TRESEC register is disabled.
When bits TSTART and TCSTF in the TRECR1 register are set to 0 (timer
stops), writing to the TREMIN register is enabled.
Select use of 4-bit counter
the value returns to 00h and count continues. The count value is held while
count stops.
1/fi x 2 x (n+1)
1/fi x 32 x (n+1)
counter
4-bit
TRESEC
RCS2 = 1
(1)
RCS2 = 0
Data bus
Comparison
TREMIN
counter
circuit
8-bit
Specification
Match
signal
T Q
R
COMIE
Reset
TRERST bit
Timer RE interrupt
14. Timers