C8051F018-GQ Silicon Laboratories Inc, C8051F018-GQ Datasheet - Page 104

IC 8051 MCU 16K FLASH 64TQFP

C8051F018-GQ

Manufacturer Part Number
C8051F018-GQ
Description
IC 8051 MCU 16K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Datasheets

Specifications of C8051F018-GQ

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1197

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14.6.5. Status Register
The SMB0STA Status register holds an 8-bit status code indicating the current state of the SMBus. There are 28
possible SMBus states, each with a corresponding unique status code. The five most significant bits of the status
code vary while the three least-significant bits of a valid status code are fixed at zero when SI = 1. Therefore, all
possible status codes are multiples of eight. This facilitates the use of status codes in software as an index used to
branch to appropriate service routines (allowing 8 bytes of code to service the state or jump to a more extensive
service routine).
For the purposes of user software, the contents of the SMB0STA register is only defined when the SI flag is logic 1.
Software should never write to the SMB0STA register. Doing so will yield indeterminate results. The 28 SMBus
states, along with their corresponding status codes, are given in Table 14.1.
Bits7-3: STA7-STA3: SMBus Status Code.
Bits2-0: STA2-STA0: The three least significant bits of SMB0STA are always read as logic 0 when
STA7
R/W
Bit7
These bits contain the SMBus Status Code. There are 28 possible status codes. Each
status code corresponds to a single SMBus state. A valid status code is present in
SMB0STA when the SI flag (SMB0CN.3) is set. The content of SMB0STA is not defined
when the SI flag is logic 0. Writing to the SMB0STA register at any time will yield
indeterminate results.
the SI flag is logic 1.
STA6
R/W
Bit6
STA5
R/W
Bit5
Figure 14.8. SMB0STA: SMBus Status Register
STA4
R/W
Bit4
Rev. 1.2
STA3
R/W
Bit3
STA2
R/W
Bit2
STA1
R/W
Bit1
C8051F018
C8051F019
STA0
R/W
Bit0
SFR Address:
Reset Value
11111000
0xC1
104

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