PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 566

IC PIC MCU FLASH 512K 64-TQFP

PIC32MX440F512H-80I/PT

Manufacturer Part Number
PIC32MX440F512H-80I/PT
Description
IC PIC MCU FLASH 512K 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
64-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5 x 16 bit, 1 x 32 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
51
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX440F512H-80I/PT
Manufacturer:
ELPIDA
Quantity:
1 000
Part Number:
PIC32MX440F512H-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX3XX/4XX
27.1
In PIC32MX3XX/4XX devices, the Configuration
Words select various device configurations. These
Configuration Words are implemented as volatile mem-
ory registers and must be loaded from the nonvolatile
programmed configuration data mapped in the last four
words (32-bit x 4 words) of boot Flash memory,
DEVCFG0-DEVCFG3. These are the four locations an
external programming device programs with the appro-
priate configuration data (see Table 27-3).
TABLE 27-3:
On Power-on Reset (POR) or any Reset, the Configu-
ration Words are copied from boot FLASH memory to
their corresponding Configuration registers. A Configu-
ration bit can only be programmed = 0 (unprogrammed
state = 1). During programming, a Configuration Word
can be programmed a maximum of two times before a
page erase must be performed.
After programming the Configuration Words, the user
should reset the device to ensure the Configuration
registers are reloaded with the new programmed data.
27.1.1
To prevent inadvertent Configuration bit changes dur-
ing code execution, all programmable Configuration
bits are write-once. After a bit is initially programmed
during a power cycle, it cannot be written to again.
Changing a device configuration requires changes to
the configuration data in the boot Flash memory and
power to the device be cycled.
To ensure the 128-bit data integrity, a comparison is
continuously made between each Configuration bit and
its stored complement. If a mismatch is detected, a
Configuration Mismatch Reset is generated, causing a
device Reset.
DS61143C-page 564
Configuration Word
Device Configuration
DEVCFG0
DEVCFG1
DEVCFG2
DEVCFG3
CONFIGURATION REGISTER
PROTECTION
DEVCFG LOCATIONS
0xBFC0_2FFC
0xBFC0_2FF8
0xBFC0_2FF4
0xBFC0_2FF0
Address
Preliminary
27.2
The PIC32MX features a single device code protection
bit, CP that when programmed = 0, protects boot Flash
and program Flash from being read or modified by an
external programming device. When code protection is
enabled, only the Device ID registers is available to be
read by an external programmer. Boot Flash and pro-
gram Flash memory are not protected from self-pro-
gramming during program execution when code
protection is enabled. See Section 27.3 “Program
Write Protection (PWP)”.
27.3
In addition to a device code protection bit, the
PIC32MX also features write protection bits to prevent
boot Flash and program Flash memory regions from
being written during code execution.
Boot Flash memory is write protected with a single
Configuration bit, BWP (DEVCFG0<24>), when
programmed = 0.
Program Flash memory can be write-protected entirely
or in selectable page sizes using Configuration bits
PWP<7:0> (DEVCFG0<19:12>). A page of Program
Flash memory is 4096 bytes (1024 words). The PWP
bits represent the one’s complement of the number of
protected pages. For example, programming PWP bits
= 0xFF selects 0 pages to be write-protected, effec-
tively disabling the program Flash write protection. Pro-
gramming PWP bits = 0xFE selects the first page to be
write protected. When enabled, the write-protected
memory range is inclusive from the beginning of pro-
gram Flash memory (0xBD00_0000) up through the
selected page. Refer to Table 27-4.
Note:
Device Code Protection
Program Write Protection (PWP)
The PWP bits represent the one’s
complement of the number of protected
pages.
© 2008 Microchip Technology Inc.

Related parts for PIC32MX440F512H-80I/PT