PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 297

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Software must set RESUME for 1-15 ms if a USB
device, or >20 ms if a USB host, then clear it to enable
remote wake-up. For more information on RESUME
signaling, see Section 7.1.7.7, 11.9 and 11.4.4 in the
USB 2.0 specification.
Writing RESUME will automatically clear the special
hardware suspend (low-power) state.
If the part is acting as a USB host, software should, at
minimum, set the SOFEN (U1CON<0>) after driving its
resume signaling. Otherwise, the USB link would return
right back to the suspend state. Also, software must not
initiate any downstream traffic for 10 ms following the
end of resume signaling.
11.33.1.4
When the USB logic detects resume signaling on the
USB bus for 2.5 μs, hardware will set the RESUMEIF
(U1IR<5>) interrupt.
A device receiving resume signaling must prepare itself
to receive normal USB activity. A host receiving resume
signaling must immediately start driving resume signal-
ing of its own. The special hardware suspend (low-
power) state is automatically cleared upon receiving
any activity on the USB link.
Reception of any activity on the USB link (this may be
due to resume signaling or a link disconnect) while the
PIC32MX is in Sleep mode will cause the ACTVIF
(U1OTGIR<4>) interrupt to be set. This will cause
wake-up from Sleep.
11.33.1.5
SRP support is not required by non-OTG applications.
SRP may only be initiated at full speed. Refer to the
On-The-Go Supplement specification for more infor-
mation regarding SRP.
An OTG A-device or embedded host may decide to
power-down the V
USB link. Software may do this by clearing VBUSON
(U1OTGCON<3>). When the V
down, the A-device is said to have ended a USB ses-
sion.
An OTG A-device or embedded host may repower the
V
OTG B-device may also request that the OTG A-device
repower the V
is the purpose of the SRP.
Prior to requesting a new session, the B-device must
first check that the previous session has definitely
ended. To do this, the B-device must check that:
© 2008 Microchip Technology Inc.
BUS
Note:
supply at any time to initiate a new session. An
When the A-device powers down the V
supply, the B-device must disconnect its
pull-up resistor unless signalling a desire
to become host during HNP negotiation.
Refer to Section 11.33.1.6 “HNP”.
Receiving Resume Signaling
SRP Support
BUS
supply to initiate a new session. This
BUS
supply when it is not using the
BUS
supply is powered
BUS
Preliminary
1.
2.
The B-device will be notified of condition 1 by the SES-
ENDIF (U1OTGIR<2>) interrupt.
Software can use the LSTATEIF (U1OTGIR<5>) bit
and the 1 ms timer to identify condition 2.
The B-device may aid in achieving condition 1 by dis-
charging the V
may do this by setting VBUSDIS (U1OTGCON<0>).
The B-device then proceeds by pulsing the D+ data
line. Software should do this by setting DPPULUP
(U1OTGCON<7>). The data line should be held high
for 5-10 ms.
After these initial conditions are met, the B-device may
begin requesting the new session. It begins by pulsing
the V
VBUSCHG (U1OTGCON<1>).
When an A-device detects SRP signaling (either via the
ATTACHIF (U1IR<6>) interrupt or via the SESVDIF
(U1OTGIR<3>) interrupt), the A-device must restore
the
(U1OTGCON<3>).
The B-device should not monitor the state of the V
supply while performing V
wards, if the B-device does detect that the V
has been restored (via the SESVDIF (U1OTGIR<3>)
interrupt), it must reconnect to the USB link by pulling
up D+. The A-device must complete the SRP by
enabling V
11.33.1.6
An OTG application with a micro-AB receptacle must
support HNP. HNP allows an OTG B-device to tempo-
rarily become the USB host. The A-device must first
enable HNP in the B-device. HNP may only be initiated
at full-speed. Refer to the On-The-Go supplement for
more information regarding HNP.
After being enabled for HNP by the A-device, the B-device
can request to become the host any time that the USB link is
in suspend state by simply indicating a disconnect. Software
may accomplish this by clearing the DPPULUP bit
(U1OTGCON<7>).
When the A-device detects the disconnect condition
(via the URSTIF (U1IR<0>) interrupt), the A-device
may allow the B-device to take over as host. The A-
device does this by signaling connect as a full-speed
device. Software may accomplish this by disabling host
operation, HOSTEN = 0 (U1CON<3>), and connecting
as a device (DPPULUP = 1). If the A-device instead
responds with resume signaling, the A-device will
remain as host.
When the B-device detects the connect condition (via
ATTACHIF (U1IR<6>), the B-device becomes host.
The B-device drives Reset signaling prior to using the
bus.
V
Both D+ and D- have been low for at least 2 ms.
BUS
BUS
V
PIC32MX3XX/4XX
BUS
supply is below the session end voltage.
supply. Software should do this by setting
BUS
HNP
BUS
and driving reset signalling.
supply
supply through a resistor. Software
by
BUS
supply pulsing. After-
setting
DS61143C-page 295
BUS
VBUSON
supply
BUS