PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 346

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
14.3
The 16-bit (default) and 32-bit mode timer peripherals
can operate as synchronous timer/counters using inter-
nal or external clock sources, or as synchronous gated
timers using an internal clock source and external
clock/gate pins. Each mode is easily configured and
described in the following sections.
14.3.1
• A timer module is disabled and powered off when
• Updates to the TxCON register should only be
• A timer continues operating when the CPU goes
• Setting or clearing the ON bit (TxCON<15>) and
14.3.2
In this mode, the timer clock source is the internal
PBCLK (Peripheral Bus Clock), TCS (TxCON<1>) = 0.
The 16-bit TMRx Count register increments on every
internal PBCLK cycle when the timer clock prescale
<TCKPS> is 1:1.
The timer generates a timer match event after the
TMRx Count register matches the PRx Period register
value, then resets to 0x0000 on the next PBCLK clock
cycle. The timer continues to increment and repeat the
period match until the timer is disabled. For further
details regarding timer events and interrupts, see
Section 14.4 Timer Interrupts.
For clock prescale = N (other than 1:1), the timer oper-
ates at a clock rate = (PBCLK/N); therefore, the TMRx
Count register increments on every Nth PBCLK clock
cycle. For further details regarding timer prescaler,
refer to Section 14.3.9 Timer Clock Prescaler.
DS61143C-page 344
the ON bit (TxCON<15>) = 0, thus providing
maximum power savings. All other TxCON bits
remain unchanged.
performed when the timer module is disabled, ON
bit (TxCON<15>) = 0.
into Idle mode if the “Stop In Idle mode” control bit
is disabled, SIDL (TxCON<13>) bit = 0. If
enabled, SIDL = 1, the timer module stops
operation while the CPU is in Idle mode.
any other bits in the TxCON register during a
single instruction may cause undefined behavior.
The user is advised to program the TxCON
register with the desired settings with one instruc-
tion, and then set the ON bit in a subsequent
instruction.
Modes of Operation
CONSIDERATIONS FOR ALL TIMER
MODES
SYNCHRONOUS INTERNAL 16-BIT
TIMER
Preliminary
The following steps should be performed to properly
configure the 16-bit Timer peripherals for Timer mode
operation:
1.
2.
3.
4.
5.
6.
7.
EXAMPLE 14-1:
14.3.3
In this mode, the timer clock source is an external clock
source or pulse applied to the TxCK pin, TCS
(TxCON<1>) = 1. The 16-bit TMRx Count register
increments on every rising edge of an external clock
when the timer clock prescale <TCKPS> is 1:1.
The timer generates a timer match event after the
TMRx Count register matches the PRx register value,
then resets to 0x0000 on the next external clock cycle.
The timer continues to increment and repeat the period
match until the timer is disabled. For further details
regarding
Section 14.4 Timer Interrupts.
For clock prescale = N (other than 1:1), the timer
operates at a clock rate = (external clock/N); there-
fore, the TMRx Count register increments on every
Nth external clock cycle. For further details regarding
the timer prescaler, refer to Section 14.3.9 Timer
Clock Prescaler.
T2CON = 0x0;
TMR2 = 0x0;
PR2 = 0xFFFF;
T2CONSET = 0x8000; // Start Timer
Note:
Clear ON control bit, (TxCON<15>) = 0, to
disable timer.
Configure TCKPS control bits, (TxCON<6:4), to
select desired timer clock prescale.
Set TCS control bit, (TxCON<1>) = 0, to select
the internal PBCLK clock source.
Clear TMRx register.
Load PRx register with desired 16-bit match
value.
If timer interrupts are to be used, refer to
Section 14.4 Timer Interrupts for interrupt
configuration steps.
Set ON control bit = 1 to enable Timer.
SYNCHRONOUS EXTERNAL 16-BIT
TIMER
TxCK pins not available on 64-pin devices.
timer
events
SYNCHRONOUS
INTERNAL 16-BIT TIMER
INITIALIZATION
//Clear timer register
//Load period register
© 2008 Microchip Technology Inc.
//Stop and Init Timer
and
interrupts,
see