PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 398

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
17.2.4.12
The following steps are used to set up the SPI module
for the Slave mode of operation:
1.
2.
3.
4.
5.
6.
FIGURE 17-10:
DS61143C-page 396
If interrupts are used, disable the SPI interrupts
in the respective IEC0/1 register.
Stop and reset the SPI module by clearing the
ON bit.
Clear the receive buffer.
If using interrupts, the following additional steps
are performed:
• Clear the SPIx interrupt flags/events in the
• Set the SPIx interrupt enable bits in the
• Write the SPIx interrupt priority and subprior-
Clear the SPIROV bit (SPIxSTAT<6>).
Write the selected configuration settings to the
SPIxCON register.
respective IFS0/1 register.
respective IEC0/1 register.
ity bits in the respective IPC5/7 register.
Note 1: In Framed SPI modes, the SSx pin is used to transmit/receive the frame synchronization pulse.
Framed Slave Mode Initialization
2: Framed SPI modes require the use of all four pins (i.e., using the SSx pin is not optional).
3: Slave Select is not available when using Frame mode as a slave device.
[SPI Slave, Frame Slave]
SPI SLAVE, FRAME SLAVE CONNECTION DIAGRAM
PIC32MX3XX/4XX
SDOx
SCKx
SDIx
SSx
Preliminary
Serial Clock
Frame Sync
Pulse
(1)(2)(3)
7.
8.
Note 1: The user must turn off the SPI device
Enable SPI operation by setting the ON bit
(SPIxCON<15>).
Transmission (and reception) will start as soon
as the master provides the serial clock.
SDOx
SDIx
SCKx
SSx
[SPI Master, Frame Master]
2: The SPIxSR register cannot be written
3: Receiving a frame sync pulse will start a
prior to changing the CKE or CKP bits.
Otherwise, the behavior of the device is
not ensured.
into directly by the user. All writes to the
SPIxSR register are performed through
the SPIxBUF register.
transmission, regardless of whether or
not data was written to SPIxBUF. If a
write was not performed, zeros will be
transmitted.
PROCESSOR 2
© 2008 Microchip Technology Inc.