PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 241

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

EXAMPLE 10-6:
EXAMPLE 10-7:
© 2008 Microchip Technology Inc.
/*
The following code example demonstrates a simple Interrupt Service Routine for DMA channel 0
interrupts. The user’s code at this vector should perform any application specific operations
and must clear the DMA0 interrupt flags before exiting.
*/
void __ISR(_DMA0_VECTOR, IPL5) __DMA0Interrupt(void)
{
}
/*
The following code example illustrates a DMA channel 0 interrupt configuration.
When the DMA channel 0 interrupt is generated, the CPU will jump to the vector assigned to DMA0
interrupt.
*/
Note:
int dmaFlags=DCH0INT&0xff;
// perform application specific operations in response to any interrupt flag set
DCH0INTCLR=0x000000ff;
IFS1CLR = 0x00010000;
IEC1CLR=0x00010000;
IFS1CLR=0x00010000;
DMACONSET=0x00008000;
DCH0CON=0x03;
DCH0ECON=0;
DCH0SSA=0x1d010000;
DCH0DSA=0x1d020000;
DCH0SSIZ=0;
DCH0DSIZ=0;
DCH0CSIZ=0;
DCH0INTCLR=0x00ff00ff;
DCH0INTSET=0x00090000;
IPC9CLR=0x0000001f;
IPC9SET=0x00000016;
IEC1SET=0x00010000;
DCH0CONSET=0x80;
DCH0ECONSET=0x00000080;
// do something else
// will get an interrupt when the block transfer is done
// or when error occurred
The DMA ISR code example shows MPLAB
compiler manual regarding support for ISRs.
DMA INITIALIZATION WITH INTERRUPTS
DMA CHANNEL 0 ISR
// disable DMA channel 0 interrupts
// clear any existing DMA channel 0 interrupt flag
// enable the DMA controller
// channel off, priority 3, no chaining
// no start or stop irq’s, no pattern match
// program the transfer
// transfer source physical address
// transfer destination physical address
// source size 256 bytes
// destination size 256 bytes
// 256 bytes transferred pe event
// clear existing events, disable all interrupts
// enable Block Complete and error interrupts
// clear the DMA channel 0 priority and subpriority
// set IPL 5, subpriority 2
// enable DMA channel 0 interrupt
// turn channel on
// initiate a transfer
// set CFORCE to 1
// read the interrupt flags
// clear the DMA channel interrupt flags
// Be sure to clear the DMA0 interrupt flags
// before exiting the service routine.
Preliminary
®
C32 C compiler specific syntax. Refer to your
PIC32MX3XX/4XX
DS61143C-page 239