PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet - Page 45

IC PIC MCU FLASH 24KX16 64TQFP

PIC18F6527-I/PT

Manufacturer Part Number
PIC18F6527-I/PT
Description
IC PIC MCU FLASH 24KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F6527-I/PT

Program Memory Type
FLASH
Program Memory Size
48KB (24K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
SPI/I2C/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
FIGURE 3-1:
FIGURE 3-2:
3.2.3
In RC_RUN mode, the CPU and peripherals are
clocked from the internal oscillator block using the
INTOSC multiplexer. In this mode, the primary clock is
shut down. When using the INTRC source, this mode
provides the best power conservation of all the Run
modes, while still executing code. It works well for user
applications which are not highly timing sensitive or do
not require high-speed clocks at all times.
If the primary clock source is the internal oscillator
block (either INTRC or INTOSC), there are no distin-
guishable
RC_RUN modes during execution. However, a clock
switch delay will occur during entry to and exit from
RC_RUN mode. Therefore, if the primary clock source
is the internal oscillator block, the use of RC_RUN
mode is not recommended.
 2004 Microchip Technology Inc.
Note 1: Clock transition typically occurs within 2-4 T
Peripheral
Program
Counter
T1OSI
OSC1
Note1: T
Clock
Clock
RC_RUN MODE
CPU Clock
CPU
PLL Clock
Peripheral
differences
Program
Counter
Output
2: Clock transition typically occurs within 2-4 T
T1OSI
OSC1
Clock
Q1
OST
SCS1:SCS0 bits Changed
Q2
= 1024 T
TRANSITION TIMING FOR ENTRY TO SEC_RUN MODE
PC
TRANSITION TIMING FROM SEC_RUN MODE TO PRI_RUN MODE (HSPLL)
Q3
between
Q4
OSC
; T
Q1
PLL
Q1
1
= 2 ms (approx). These intervals are not shown to scale.
T
PRI_RUN
OST
PC
(1)
2
Q2
Clock Transition
3
OSC
T
OSTS bit Set
Q3
PLL
and
Preliminary
.
OSC
(1)
.
(1)
PC + 2
n-1
Q4
This mode is entered by setting the SCS1 bit to ‘1’.
Although it is ignored, it is recommended that the SCS0
bit also be cleared; this is to maintain software compat-
ibility with future devices. When the clock source is
switched to the INTOSC multiplexer (see Figure 3-3),
the primary oscillator is shut down and the OSTS bit is
cleared. The IRCF bits may be modified at any time to
immediately change the clock speed.
n
Q1
PIC18F8722 FAMILY
1
Note:
Transition
2
Clock
n-1 n
(2)
Q2
Caution should be used when modifying a
single IRCF bit. If V
possible to select a higher clock speed
than is supported by the low V
Improper device operation may result if
the V
PC + 2
DD
Q3
/F
Q2
OSC
Q4
Q3 Q4
specifications are violated.
Q1
DD
Q1
PC + 4
Q2
is less than 3V, it is
PC + 4
Q2
DS39646B-page 43
Q3
Q3
DD
.

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