PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet - Page 194

• Manufacturer Part Number: PIC18F6527-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6527-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F8722 FAMILY
18.1.3
Like the standard CCP modules, the ECCP modules
can utilize Timers 1, 2, 3 or 4, depending on the mode
selected. Timer1 and Timer3 are available for modules
in Capture or Compare modes, while Timer2 and
Timer4 are available for modules in PWM mode.
Additional details on timer resources are provided in
Section 17.1.1
Resources”.
18.2
With the exception of the special event trigger
discussed below, the Capture and Compare modes of
the ECCP modules are identical in operation to that of
CCP4. These are discussed in detail in Section 17.2
“Capture
Mode”.
18.2.1
The special event trigger output of ECCPx resets the
TMR1 or TMR3 register pair, depending on which timer
resource is currently selected. This allows the CCPRx
registers to effectively be 16-bit programmable period
registers for Timer1 or Timer3.
18.3
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode as described in Section 17.4
“PWM Mode”. This is also sometimes referred to as
“Compatible
through 18-3.
18.4
The Enhanced PWM mode provides additional PWM
output options for a broader range of control applica-
tions. The module is a backward compatible version of
the standard CCP module and offers up to four outputs,
designated PxA through PxD. Users are also able to
select the polarity of the signal (either active-high or
active-low). The module’s output mode and polarity
are configured by setting the PxM1:PxM0 and
CCPxM3:CCPxM0 bits of the CCPxCON register
(CCPxCON<7:6> and CCPxCON<3:0>, respectively).
DS39646B-page 192
Note:
Capture and Compare Modes
Standard PWM Mode
Enhanced PWM Mode
ECCP MODULES AND TIMER
RESOURCES
SPECIAL EVENT TRIGGER
When setting up single output PWM
operations, users are free to use either of
the processes described in Section 17.4.3
“Setup
Section 18.4.9 “Setup for PWM Opera-
tion”. The latter is more generic, but will
work for either single or multi-output PWM.
Mode”
CCP”
“CCP
and
for
mode
Section 17.3
Modules
PWM
as
Operation”
in
and
Tables 18-1
“Compare
Timer
Preliminary
or
For the sake of clarity, Enhanced PWM mode operation
is described generically throughout this section with
respect to ECCP1 and TMR2 modules. Control register
names are presented in terms of ECCP1. All three
Enhanced modules, as well as the two timer resources,
can be used interchangeably and function identically.
TMR2 or TMR4 can be selected for PWM operation by
selecting the proper bits in T3CON.
Figure 18-1 shows a simplified block diagram of PWM
operation. All control registers are double-buffered and
are loaded at the beginning of a new PWM cycle (the
period boundary when Timer2 resets) in order to pre-
vent glitches on any of the outputs. The exception is the
PWM delay register, ECCP1DEL, which is loaded at
either the duty cycle boundary or the boundary period
(whichever comes first). Because of the buffering, the
module waits until the assigned timer resets instead of
starting immediately. This means that Enhanced PWM
waveforms do not exactly match the standard PWM
waveforms, but are instead offset by one full instruction
cycle (4 T
As before, the user must manually configure the
appropriate TRIS bits for output.
18.4.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following equation:
EQUATION 18-1:
PWM frequency is defined as 1/[PWM period]. When
TMR2 is equal to PR2, the following three events occur
on the next increment cycle:
• TMR2 is cleared
• The ECCP1 pin is set (if PWM duty cycle = 0%,
• The PWM duty cycle is copied from CCPR1L into
the ECCP1 pin will not be set)
CCPR1H
Note:
PWM Period = [(PR2) + 1] • 4 • T
OSC
PWM PERIOD
The Timer2 postscaler (see Section 14.0
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
).
(TMR2 Prescale Value)
 2004 Microchip Technology Inc.
OSC
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